1 C00   23:12 JUN 20,'83                                                                          PAGE    1
A   .SS BA,HA,WA,DA,LF,CF,AF,AFA,NAME,NUM,ABSVAL
    .SS R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15
    .SS X1,X2,X3,X4,X5,X6,X7,SCOR,TCOR,%,%%
    .END
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    2
A       1                                     PCC
        2         TEXT               VERSION  EQU      C'G02'
        3         TEXT               CATALOG  EQU      C'0306'
        4                            TITLE    EQU      S:PT('TELEFILE CPU DIAGNOSTIC, VERIFY ',;
        5         TEXT                                 '960-',CATALOG,'-',VERSION)

        7                                     SYSTEM   SIG7FDP

        9                            *        PROGRAM CONTROL AND DISPLAY INFORMATION
       10                            *
       11                            *        SENSE    CONDITION    ACTION
       12                            *        SWITCH
       13                            *
       14                            *        2        RESET        NORMAL OPERATION
       15                            *                 SET          LOOP ON CURRENT BLOCK
       16                            *
       17                            *        3        RESET        NORMAL OPERATION
       18                            *                 SET          REPORT
       19                            *
       20                            *        4        RESET        HALT ON ERRORS
       21                            *                 SET          NO HALT ON ERRORS

       23                            *        REGISTER    CONTENTS
       24                            *
       25                            *        0           ALL ATTEMPTED OPERATIONS ADDRESS ONLY THIS REGISTER
       26                            *
       27                            *        1           ADDRESS OF LAST BLOCK ATTEMPTED OR ERRORING BLOCK
       28                            *
       29                            *        2           ERROR COUNT
       30                            *
       31                            *        3           RUN COUNT

       33         0000000A           A        EQU      X'A'
       34         0000000B           B        EQU      X'B'
       35         0000000C           C        EQU      X'C'
       36         0000000D           D        EQU      X'D'
       37         0000000E           E        EQU      X'E'
       38         0000000F           F        EQU      X'F'
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    3
A      40   01 00040                          ORG      X'40'
            01 00040
       41                            *
       42                            * TRAP LOCATIONS (ALL SPURIOUS)
       43                            *
       44   01 00040    0F0008E8              XPSD,0   NONOP
       45   01 00041    0F0008EC              XPSD,0   UNIMP
       46   01 00042    0F0008F0              XPSD,0   STACK
       47   01 00043    0F0008F4              XPSD,0   OFLO
       48   01 00044    0F0008F8              XPSD,0   FLOAT
       49   01 00045    0F0008FC              XPSD,0   DEC
       50   01 00046    0F000900              XPSD,0   TIMER
       51   01 00047    0F000904              XPSD,0   TUNASS
       52   01 00048    0F000908              XPSD,0   CALL1
       53   01 00049    0F00090C              XPSD,0   CALL2
       54   01 0004A    0F000910              XPSD,0   CALL3
       55   01 0004B    0F000914              XPSD,0   CALL4
       56   01 0004C    0F000904              XPSD,0   TUNASS
       57   01 0004D    0F000904              XPSD,0   TUNASS
       58   01 0004E    0F000904              XPSD,0   TUNASS
       59   01 0004F    0F000904              XPSD,0   TUNASS
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    4
A      61                            *
       62                            * INTERRUPT LOCATIONS (ALL SPURIOUS)
       63                            *
       64   01 00050    0F000918              XPSD,0   POWON
       65   01 00051    0F00091C              XPSD,0   POWOFF
       66   01 00052    33000920              MTW,0    PULSE1
       67   01 00053    33000921              MTW,0    PULSE2
       68   01 00054    33000922              MTW,0    PULSE3
       69   01 00055    33000923              MTW,0    PULSE4
       70   01 00056    0F000924              XPSD,0   MEMPAR
       71   01 00057    0F000928              XPSD,0   UNASIN
       72   01 00058    0F00092C              XPSD,0   COUNT1
       73   01 00059    0F000930              XPSD,0   COUNT2
       74   01 0005A    0F000934              XPSD,0   COUNT3
       75   01 0005B    0F000938              XPSD,0   COUNT4
       76   01 0005C    0F00093C              XPSD,0   INOUT
       77   01 0005D    0F000940              XPSD,0   PANEL
       78   01 0005E    0F000928              XPSD,0   UNASIN
       79   01 0005F    0F000928              XPSD,0   UNASIN
       80   01 00060    0F000944              XPSD,0   EXTERN
       81   01 00061    0F000944              XPSD,0   EXTERN
       82   01 00062    0F000944              XPSD,0   EXTERN
       83   01 00063    0F000944              XPSD,0   EXTERN
       84   01 00064    0F000944              XPSD,0   EXTERN
       85   01 00065    0F000944              XPSD,0   EXTERN
       86   01 00066    0F000944              XPSD,0   EXTERN
       87   01 00067    0F000944              XPSD,0   EXTERN
       88   01 00068    0F000944              XPSD,0   EXTERN
       89   01 00069    0F000944              XPSD,0   EXTERN
       90   01 0006A    0F000944              XPSD,0   EXTERN
       91   01 0006B    0F000944              XPSD,0   EXTERN
       92   01 0006C    0F000944              XPSD,0   EXTERN
       93   01 0006D    0F000944              XPSD,0   EXTERN
       94   01 0006E    0F000944              XPSD,0   EXTERN
       95   01 0006F    0F000944              XPSD,0   EXTERN
       96   01 00070    0F000944              XPSD,0   EXTERN
       97   01 00071    0F000944              XPSD,0   EXTERN
       98   01 00072    0F000944              XPSD,0   EXTERN
       99   01 00073    0F000944              XPSD,0   EXTERN
      100   01 00074    0F000944              XPSD,0   EXTERN
      101   01 00075    0F000944              XPSD,0   EXTERN
      102   01 00076    0F000944              XPSD,0   EXTERN
      103   01 00077    0F000944              XPSD,0   EXTERN
      104   01 00078    0F000944              XPSD,0   EXTERN
      105   01 00079    0F000944              XPSD,0   EXTERN
      106   01 0007A    0F000944              XPSD,0   EXTERN
      107   01 0007B    0F000944              XPSD,0   EXTERN
      108   01 0007C    0F000944              XPSD,0   EXTERN
      109   01 0007D    0F000944              XPSD,0   EXTERN
      110   01 0007E    0F000944              XPSD,0   EXTERN
      111   01 0007F    0F000944              XPSD,0   EXTERN
      112   01 00080    0F000944              XPSD,0   EXTERN
      113   01 00081    0F000944              XPSD,0   EXTERN
      114   01 00082    0F000944              XPSD,0   EXTERN
      115   01 00083    0F000944              XPSD,0   EXTERN
      116   01 00084    0F000944              XPSD,0   EXTERN
      117   01 00085    0F000944              XPSD,0   EXTERN
      118   01 00086    0F000944              XPSD,0   EXTERN
      119   01 00087    0F000944              XPSD,0   EXTERN
      120   01 00088    0F000944              XPSD,0   EXTERN
      121   01 00089    0F000944              XPSD,0   EXTERN
      122   01 0008A    0F000944              XPSD,0   EXTERN
      123   01 0008B    0F000944              XPSD,0   EXTERN
      124   01 0008C    0F000944              XPSD,0   EXTERN
      125   01 0008D    0F000944              XPSD,0   EXTERN
      126   01 0008E    0F000944              XPSD,0   EXTERN
      127   01 0008F    0F000944              XPSD,0   EXTERN
      128   01 00090    0F000944              XPSD,0   EXTERN
      129   01 00091    0F000944              XPSD,0   EXTERN
      130   01 00092    0F000944              XPSD,0   EXTERN
      131   01 00093    0F000944              XPSD,0   EXTERN
      132   01 00094    0F000944              XPSD,0   EXTERN
      133   01 00095    0F000944              XPSD,0   EXTERN
      134   01 00096    0F000944              XPSD,0   EXTERN
      135   01 00097    0F000944              XPSD,0   EXTERN
      136   01 00098    0F000944              XPSD,0   EXTERN
      137   01 00099    0F000944              XPSD,0   EXTERN
      138   01 0009A    0F000944              XPSD,0   EXTERN
      139   01 0009B    0F000944              XPSD,0   EXTERN
      140   01 0009C    0F000944              XPSD,0   EXTERN
      141   01 0009D    0F000944              XPSD,0   EXTERN
      142   01 0009E    0F000944              XPSD,0   EXTERN
      143   01 0009F    0F000944              XPSD,0   EXTERN
      144   01 000A0    0F000944              XPSD,0   EXTERN
      145   01 000A1    0F000944              XPSD,0   EXTERN
      146   01 000A2    0F000944              XPSD,0   EXTERN
      147   01 000A3    0F000944              XPSD,0   EXTERN
      148   01 000A4    0F000944              XPSD,0   EXTERN
      149   01 000A5    0F000944              XPSD,0   EXTERN
      150   01 000A6    0F000944              XPSD,0   EXTERN
      151   01 000A7    0F000944              XPSD,0   EXTERN
      152   01 000A8    0F000944              XPSD,0   EXTERN
      153   01 000A9    0F000944              XPSD,0   EXTERN
      154   01 000AA    0F000944              XPSD,0   EXTERN
      155   01 000AB    0F000944              XPSD,0   EXTERN
      156   01 000AC    0F000944              XPSD,0   EXTERN
      157   01 000AD    0F000944              XPSD,0   EXTERN
      158   01 000AE    0F000944              XPSD,0   EXTERN
      159   01 000AF    0F000944              XPSD,0   EXTERN
      160   01 000B0    0F000944              XPSD,0   EXTERN
      161   01 000B1    0F000944              XPSD,0   EXTERN
      162   01 000B2    0F000944              XPSD,0   EXTERN
      163   01 000B3    0F000944              XPSD,0   EXTERN
      164   01 000B4    0F000944              XPSD,0   EXTERN
      165   01 000B5    0F000944              XPSD,0   EXTERN
      166   01 000B6    0F000944              XPSD,0   EXTERN
      167   01 000B7    0F000944              XPSD,0   EXTERN
      168   01 000B8    0F000944              XPSD,0   EXTERN
      169   01 000B9    0F000944              XPSD,0   EXTERN
      170   01 000BA    0F000944              XPSD,0   EXTERN
      171   01 000BB    0F000944              XPSD,0   EXTERN
      172   01 000BC    0F000944              XPSD,0   EXTERN
      173   01 000BD    0F000944              XPSD,0   EXTERN
      174   01 000BE    0F000944              XPSD,0   EXTERN
      175   01 000BF    0F000944              XPSD,0   EXTERN
      176   01 000C0    0F000944              XPSD,0   EXTERN
      177   01 000C1    0F000944              XPSD,0   EXTERN
      178   01 000C2    0F000944              XPSD,0   EXTERN
      179   01 000C3    0F000944              XPSD,0   EXTERN
      180   01 000C4    0F000944              XPSD,0   EXTERN
      181   01 000C5    0F000944              XPSD,0   EXTERN
      182   01 000C6    0F000944              XPSD,0   EXTERN
      183   01 000C7    0F000944              XPSD,0   EXTERN
      184   01 000C8    0F000944              XPSD,0   EXTERN
      185   01 000C9    0F000944              XPSD,0   EXTERN
      186   01 000CA    0F000944              XPSD,0   EXTERN
      187   01 000CB    0F000944              XPSD,0   EXTERN
      188   01 000CC    0F000944              XPSD,0   EXTERN
      189   01 000CD    0F000944              XPSD,0   EXTERN
      190   01 000CE    0F000944              XPSD,0   EXTERN
      191   01 000CF    0F000944              XPSD,0   EXTERN
      192   01 000D0    0F000944              XPSD,0   EXTERN
      193   01 000D1    0F000944              XPSD,0   EXTERN
      194   01 000D2    0F000944              XPSD,0   EXTERN
      195   01 000D3    0F000944              XPSD,0   EXTERN
      196   01 000D4    0F000944              XPSD,0   EXTERN
      197   01 000D5    0F000944              XPSD,0   EXTERN
      198   01 000D6    0F000944              XPSD,0   EXTERN
      199   01 000D7    0F000944              XPSD,0   EXTERN
      200   01 000D8    0F000944              XPSD,0   EXTERN
      201   01 000D9    0F000944              XPSD,0   EXTERN
      202   01 000DA    0F000944              XPSD,0   EXTERN
      203   01 000DB    0F000944              XPSD,0   EXTERN
      204   01 000DC    0F000944              XPSD,0   EXTERN
      205   01 000DD    0F000944              XPSD,0   EXTERN
      206   01 000DE    0F000944              XPSD,0   EXTERN
      207   01 000DF    0F000944              XPSD,0   EXTERN
      208   01 000E0    0F000944              XPSD,0   EXTERN
      209   01 000E1    0F000944              XPSD,0   EXTERN
      210   01 000E2    0F000944              XPSD,0   EXTERN
      211   01 000E3    0F000944              XPSD,0   EXTERN
      212   01 000E4    0F000944              XPSD,0   EXTERN
      213   01 000E5    0F000944              XPSD,0   EXTERN
      214   01 000E6    0F000944              XPSD,0   EXTERN
      215   01 000E7    0F000944              XPSD,0   EXTERN
      216   01 000E8    0F000944              XPSD,0   EXTERN
      217   01 000E9    0F000944              XPSD,0   EXTERN
      218   01 000EA    0F000944              XPSD,0   EXTERN
      219   01 000EB    0F000944              XPSD,0   EXTERN
      220   01 000EC    0F000944              XPSD,0   EXTERN
      221   01 000ED    0F000944              XPSD,0   EXTERN
      222   01 000EE    0F000944              XPSD,0   EXTERN
      223   01 000EF    0F000944              XPSD,0   EXTERN
      224   01 000F0    0F000944              XPSD,0   EXTERN
      225   01 000F1    0F000944              XPSD,0   EXTERN
      226   01 000F2    0F000944              XPSD,0   EXTERN
      227   01 000F3    0F000944              XPSD,0   EXTERN
      228   01 000F4    0F000944              XPSD,0   EXTERN
      229   01 000F5    0F000944              XPSD,0   EXTERN
      230   01 000F6    0F000944              XPSD,0   EXTERN
      231   01 000F7    0F000944              XPSD,0   EXTERN
      232   01 000F8    0F000944              XPSD,0   EXTERN
      233   01 000F9    0F000944              XPSD,0   EXTERN
      234   01 000FA    0F000944              XPSD,0   EXTERN
      235   01 000FB    0F000944              XPSD,0   EXTERN
      236   01 000FC    0F000944              XPSD,0   EXTERN
      237   01 000FD    0F000944              XPSD,0   EXTERN
      238   01 000FE    0F000944              XPSD,0   EXTERN
      239   01 000FF    0F000944              XPSD,0   EXTERN
      240   01 00100    0F000944              XPSD,0   EXTERN
      241   01 00101    0F000944              XPSD,0   EXTERN
      242   01 00102    0F000944              XPSD,0   EXTERN
      243   01 00103    0F000944              XPSD,0   EXTERN
      244   01 00104    0F000944              XPSD,0   EXTERN
      245   01 00105    0F000944              XPSD,0   EXTERN
      246   01 00106    0F000944              XPSD,0   EXTERN
      247   01 00107    0F000944              XPSD,0   EXTERN
      248   01 00108    0F000944              XPSD,0   EXTERN
      249   01 00109    0F000944              XPSD,0   EXTERN
      250   01 0010A    0F000944              XPSD,0   EXTERN
      251   01 0010B    0F000944              XPSD,0   EXTERN
      252   01 0010C    0F000944              XPSD,0   EXTERN
      253   01 0010D    0F000944              XPSD,0   EXTERN
      254   01 0010E    0F000944              XPSD,0   EXTERN
      255   01 0010F    0F000944              XPSD,0   EXTERN
      256   01 00110    0F000944              XPSD,0   EXTERN
      257   01 00111    0F000944              XPSD,0   EXTERN
      258   01 00112    0F000944              XPSD,0   EXTERN
      259   01 00113    0F000944              XPSD,0   EXTERN
      260   01 00114    0F000944              XPSD,0   EXTERN
      261   01 00115    0F000944              XPSD,0   EXTERN
      262   01 00116    0F000944              XPSD,0   EXTERN
      263   01 00117    0F000944              XPSD,0   EXTERN
      264   01 00118    0F000944              XPSD,0   EXTERN
      265   01 00119    0F000944              XPSD,0   EXTERN
      266   01 0011A    0F000944              XPSD,0   EXTERN
      267   01 0011B    0F000944              XPSD,0   EXTERN
      268   01 0011C    0F000944              XPSD,0   EXTERN
      269   01 0011D    0F000944              XPSD,0   EXTERN
      270   01 0011E    0F000944              XPSD,0   EXTERN
      271   01 0011F    0F000944              XPSD,0   EXTERN
      272   01 00120    0F000944              XPSD,0   EXTERN
      273   01 00121    0F000944              XPSD,0   EXTERN
      274   01 00122    0F000944              XPSD,0   EXTERN
      275   01 00123    0F000944              XPSD,0   EXTERN
      276   01 00124    0F000944              XPSD,0   EXTERN
      277   01 00125    0F000944              XPSD,0   EXTERN
      278   01 00126    0F000944              XPSD,0   EXTERN
      279   01 00127    0F000944              XPSD,0   EXTERN
      280   01 00128    0F000944              XPSD,0   EXTERN
      281   01 00129    0F000944              XPSD,0   EXTERN
      282   01 0012A    0F000944              XPSD,0   EXTERN
      283   01 0012B    0F000944              XPSD,0   EXTERN
      284   01 0012C    0F000944              XPSD,0   EXTERN
      285   01 0012D    0F000944              XPSD,0   EXTERN
      286   01 0012E    0F000944              XPSD,0   EXTERN
      287   01 0012F    0F000944              XPSD,0   EXTERN
      288   01 00130    0F000944              XPSD,0   EXTERN
      289   01 00131    0F000944              XPSD,0   EXTERN
      290   01 00132    0F000944              XPSD,0   EXTERN
      291   01 00133    0F000944              XPSD,0   EXTERN
      292   01 00134    0F000944              XPSD,0   EXTERN
      293   01 00135    0F000944              XPSD,0   EXTERN
      294   01 00136    0F000944              XPSD,0   EXTERN
      295   01 00137    0F000944              XPSD,0   EXTERN
      296   01 00138    0F000944              XPSD,0   EXTERN
      297   01 00139    0F000944              XPSD,0   EXTERN
      298   01 0013A    0F000944              XPSD,0   EXTERN
      299   01 0013B    0F000944              XPSD,0   EXTERN
      300   01 0013C    0F000944              XPSD,0   EXTERN
      301   01 0013D    0F000944              XPSD,0   EXTERN
      302   01 0013E    0F000944              XPSD,0   EXTERN
      303   01 0013F    0F000944              XPSD,0   EXTERN
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    5
A     305   01 00140                          ORG      X'140'
            01 00140
      306                            * PROGRAM INITIALIZATION
      307                            *
      308   01 00140    32200979     START    LW,2     =0
      309   01 00141    32300979              LW,3     =0
      310   01 00142    65300143     RETURN   BIR,3    %+1
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    6
A     312                            *
      313                            * BLOCK 1
      314                            *
      315                            * CHECK ABILITY OF LW = 0 TO NOT SET CC4 AND RESET CC3
      316                            *
      317   01 00143    6C000000 A   BLK1     RD,0     0                 READ SENSE SWITCHES
      318   01 00144    68200146              BCR,2    %+2               SSW 3 SET?
      319   01 00145    2E000000 A            WAIT                       YES, REPORT
      320   01 00146    3210097A              LW,1     =1                INCREMENT BLOCK COUNTER AND SET CC3
      321   01 00147    32000979              LW,0     =0                LOAD ZEROS
      322   01 00148    6910014A              BCS,1    %+2               CC4 SET?
      323   01 00149    6820014E              BCR,2    %+5               NO, CC3 RESET?
      324   01 0014A    6520014B              BIR,2    %+1               NO, ERROR - INCREMENT ERROR COUNT
      325   01 0014B    6C000000 A            RD,0     0
      326   01 0014C    6910014E              BCS,1    %+2               SSW 4 SET?
      327   01 0014D    2E000000 A            WAIT                       NO, HALT ON ERROR
      328   01 0014E    6C000000 A            RD,0     0
      329   01 0014F    69400143              BCS,4    BLK1              CHECK SSW 2 FOR LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    7
A     331                            *
      332                            * BLOCK 2
      333                            *
      334                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 31 = 1
      335                            *
      336   01 00150    6C000000 A   BLK2     RD,0     0
      337   01 00151    68200153              BCR,2    %+2
      338   01 00152    2E000000 A            WAIT                       REPORT
      339   01 00153    3210097B              LW,1     =2
      340   01 00154    32000979              LW,0     =0                RESET CC3 AND CC4
      341   01 00155    3200097A              LW,0     =1
      342   01 00156    69100158              BCS,1    %+2               CC4 SET?
      343   01 00157    6920015C              BCS,2    %+5               NO, CC3 SET?
      344   01 00158    65200159              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      345   01 00159    6C000000 A            RD,0     0
      346   01 0015A    6910015C              BCS,1    %+2
      347   01 0015B    2E000000 A            WAIT                       ERROR HALT
      348   01 0015C    6C000000 A            RD,0     0
      349   01 0015D    69400150              BCS,4    BLK2              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    8
A     351                            *
      352                            * BLOCK 3
      353                            *
      354                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 30 = 1
      355                            *
      356   01 0015E    6C000000 A   BLK3     RD,0     0
      357   01 0015F    68200161              BCR,2    %+2
      358   01 00160    2E000000 A            WAIT                       REPORT
      359   01 00161    3210097C              LW,1     =3
      360   01 00162    32000979              LW,0     =0                RESET CC3 AND CC4
      361   01 00163    3200097B              LW,0     =X'2'
      362   01 00164    69100166              BCS,1    %+2               CC4 SET?
      363   01 00165    6920016A              BCS,2    %+5               NO, CC3 SET?
      364   01 00166    65200167              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      365   01 00167    6C000000 A            RD,0     0
      366   01 00168    6910016A              BCS,1    %+2
      367   01 00169    2E000000 A            WAIT                       ERROR HALT
      368   01 0016A    6C000000 A            RD,0     0
      369   01 0016B    6940015E              BCS,4    BLK3              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE    9
A     371                            *
      372                            * BLOCK 4
      373                            *
      374                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 29 = 1
      375                            *
      376   01 0016C    6C000000 A   BLK4     RD,0     0
      377   01 0016D    6820016F              BCR,2    %+2
      378   01 0016E    2E000000 A            WAIT                       REPORT
      379   01 0016F    3210097D              LW,1     =4
      380   01 00170    32000979              LW,0     =0
      381   01 00171    3200097D              LW,0     =X'4'
      382   01 00172    69100174              BCS,1    %+2               CC4 SET?
      383   01 00173    320003D3 A            LW,0     979
      384   01 00174    69200179              BCS,2    %+5               NO, CC3 SET
      385   01 00175    6C000000 A            RD,0     0
      386   01 00176    69100178              BCS,1    %+2
      387   01 00177    2E000000 A            WAIT                       ERROR HLAT
      388   01 00178    6C000000 A            RD,0     0
      389   01 00179    6940016C              BCS,4    BLK4              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   10
A     391                            *
      392                            * BLOCK 5
      393                            *
      394                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 28 = 1
      395                            *
      396   01 0017A    6C000000 A   BLK5     RD,0     0
      397   01 0017B    6820017D              BCR,2    %+2
      398   01 0017C    2E000000 A            WAIT                       REPORT
      399   01 0017D    3210097E              LW,1     =5
      400   01 0017E    32000979              LW,0     =0
      401   01 0017F    3200097F              LW,0     =X'8'
      402   01 00180    69100182              BCS,1    %+2               CC4 SET?
      403   01 00181    69200186              BCS,2    %+5               NO, CC3 SET?
      404   01 00182    65200183              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      405   01 00183    6C000000 A            RD,0     0
      406   01 00184    69100186              BCS,1    %+2
      407   01 00185    2E000000 A            WAIT                       ERROR HALT
      408   01 00186    6C000000 A            RD,0     0
      409   01 00187    6940017A              BCS,4    BLK5              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   11
A     411                            *
      412                            * BLOCK 6
      413                            *
      414                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 27 = 1
      415                            *
      416   01 00188    6C000000 A   BLK6     RD,0     0
      417   01 00189    6820018B              BCR,2    %+2
      418   01 0018A    2E000000 A            WAIT                       REPORT
      419   01 0018B    32100980              LW,1     =6
      420   01 0018C    32000979              LW,0     =0
      421   01 0018D    32000981              LW,0     =X'10'
      422   01 0018E    69100190              BCS,1    %+2               CC4 SET?
      423   01 0018F    69200194              BCS,2    %+5               NO, CC3 SET?
      424   01 00190    65200191              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      425   01 00191    6C000000 A            RD,0     0
      426   01 00192    69100194              BCS,1    %+2
      427   01 00193    2E000000 A            WAIT                       ERROR HALT
      428   01 00194    6C000000 A            RD,0     0
      429   01 00195    69400188              BCS,4    BLK6              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   12
A     431                            *
      432                            * BLOCK 7
      433                            *
      434                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 26 = 1
      435                            *
      436   01 00196    6C000000 A   BLK7     RD,0     0
      437   01 00197    68200199              BCR,2    %+2
      438   01 00198    2E000000 A            WAIT                       REPORT
      439   01 00199    32100982              LW,1     =7
      440   01 0019A    32000979              LW,0     =0
      441   01 0019B    32000983              LW,0     =X'20'
      442   01 0019C    6910019E              BCS,1    %+2               CC4 SET?
      443   01 0019D    692001A2              BCS,2    %+5               NO, CC3 SET
      444   01 0019E    6520019F              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      445   01 0019F    6C000000 A            RD,0     0
      446   01 001A0    691001A2              BCS,1    %+2
      447   01 001A1    2E000000 A            WAIT                       ERROR HALT
      448   01 001A2    6C000000 A            RD,0     0
      449   01 001A3    69400196              BCS,4    BLK7              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   13
A     451                            *
      452                            * BLOCK 8
      453                            *
      454                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 25 =1
      455                            *
      456   01 001A4    6C000000 A   BLK8     RD,0     0
      457   01 001A5    682001A7              BCR,2    %+2
      458   01 001A6    2E000000 A            WAIT                       REPORT
      459   01 001A7    3210097F              LW,1     =8
      460   01 001A8    32000979              LW,0     =0
      461   01 001A9    32000984              LW,0     =X'40'
      462   01 001AA    691001AC              BCS,1    %+2               CC4 SET ?
      463   01 001AB    692001B0              BCS,2    %+5               NO, CC3 SET?
      464   01 001AC    652001AD              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      465   01 001AD    6C000000 A            RD,0     0
      466   01 001AE    691001B0              BCS,1    %+2
      467   01 001AF    2E000000 A            WAIT                       ERROR HALT
      468   01 001B0    6C000000 A            RD,0     0
      469   01 001B1    694001A4              BCS,4    BLK8              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   14
A     471                            *
      472                            * BLOCK 9
      473                            *
      474                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 24 = 1
      475                            *
      476   01 001B2    6C000000 A   BLK9     RD,0     0
      477   01 001B3    682001B5              BCR,2    %+2
      478   01 001B4    2E000000 A            WAIT                       REPORT
      479   01 001B5    32100985              LW,1     =9
      480   01 001B6    32000979              LW,0     =0
      481   01 001B7    32000986              LW,0     =X'80'
      482   01 001B8    691001BA              BCS,1    %+2               CC4 SET?
      483   01 001B9    692001BE              BCS,2    %+5               NO, CC3 SET?
      484   01 001BA    652001BB              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      485   01 001BB    6C000000 A            RD,0     0
      486   01 001BC    691001BE              BCS,1    %+2
      487   01 001BD    2E000000 A            WAIT                       ERROR HALT
      488   01 001BE    6C000000 A            RD,0     0
      489   01 001BF    694001B2              BCS,4    BLK9              LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   15
A     491                            *
      492                            * BLOCK 10
      493                            *
      494                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 23 = 1
      495                            *
      496   01 001C0    6C000000 A   BLK10    RD,0     0
      497   01 001C1    682001C3              BCR,2    %+2
      498   01 001C2    2E000000 A            WAIT                       REPORT
      499   01 001C3    32100981              LW,1     =X'10'
      500   01 001C4    32000979              LW,0     =0
      501   01 001C5    32000987              LW,0     =X'100'
      502   01 001C6    691001C8              BCS,1    %+2               CC4 SET?
      503   01 001C7    692001CC              BCS,2    %+5               NO, CC3 SET?
      504   01 001C8    652001C9              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      505   01 001C9    6C000000 A            RD,0     0
      506   01 001CA    691001CC              BCS,1    %+2
      507   01 001CB    2E000000 A            WAIT                       ERROR HALT
      508   01 001CC    6C000000 A            RD,0     0
      509   01 001CD    694001C0              BCS,4    BLK10             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   16
A     511                            *
      512                            * BLOCK 11
      513                            *
      514                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 22 = 1
      515                            *
      516   01 001CE    6C000000 A   BLK11    RD,0     0
      517   01 001CF    682001D1              BCR,2    %+2
      518   01 001D0    2E000000 A            WAIT                       REPORT
      519   01 001D1    32100988              LW,1     =X'11'
      520   01 001D2    32000979              LW,0     =0
      521   01 001D3    32000989              LW,0     =X'200'
      522   01 001D4    691001D6              BCS,1    %+2               CC4 SET?
      523   01 001D5    692001DA              BCS,2    %+5               NO, CC3 SET?
      524   01 001D6    652001D7              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      525   01 001D7    6C000000 A            RD,0     0
      526   01 001D8    691001DA              BCS,1    %+2
      527   01 001D9    2E000000 A            WAIT                       ERROR HALT
      528   01 001DA    6C000000 A            RD,0     0
      529   01 001DB    694001CE              BCS,4    BLK11             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   17
A     531                            *
      532                            * BLOCK 12
      533                            *
      534                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 21 = 1
      535                            *
      536   01 001DC    6C000000 A   BLK12    RD,0     0
      537   01 001DD    682001DF              BCR,2    %+2
      538   01 001DE    2E000000 A            WAIT                       REPORT
      539   01 001DF    3210098A              LW,1     =X'12'
      540   01 001E0    32000979              LW,0     =0
      541   01 001E1    3200098B              LW,0     =X'400'
      542   01 001E2    691001E4              BCS,1    %+2               CC4 SET?
      543   01 001E3    692001E8              BCS,2    %+5               NO, CC3 SET?
      544   01 001E4    652001E5              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      545   01 001E5    6C000000 A            RD,0     0
      546   01 001E6    691001E8              BCS,1    %+2
      547   01 001E7    2E000000 A            WAIT                       ERROR HALT
      548   01 001E8    6C000000 A            RD,0     0
      549   01 001E9    694001DC              BCS,4    BLK12             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   18
A     551                            *
      552                            * BLOCK 13
      553                            *
      554                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 20 = 1
      555                            *
      556   01 001EA    6C000000 A   BLK13    RD,0     0
      557   01 001EB    682001ED              BCR,2    %+2
      558   01 001EC    2E000000 A            WAIT                       REPORT
      559   01 001ED    3210098C              LW,1     =X'13'
      560   01 001EE    32000979              LW,0     =0
      561   01 001EF    3200098D              LW,0     =X'800'
      562   01 001F0    691001F2              BCS,1    %+2               CC4 SET?
      563   01 001F1    692001F6              BCS,2    %+5               NO, CC3 SET?
      564   01 001F2    652001F3              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      565   01 001F3    6C000000 A            RD,0     0
      566   01 001F4    691001F6              BCS,1    %+2
      567   01 001F5    2E000000 A            WAIT                       ERROR HALT
      568   01 001F6    6C000000 A            RD,0     0
      569   01 001F7    694001EA              BCS,4    BLK13             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   19
A     571                            *
      572                            * BLOCK 14
      573                            *
      574                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 19 = 1
      575                            *
      576   01 001F8    6C000000 A   BLK14    RD,0     0
      577   01 001F9    682001FB              BCR,2    %+2
      578   01 001FA    2E000000 A            WAIT                       REPORT
      579   01 001FB    3210098E              LW,1     =X'14'
      580   01 001FC    32000979              LW,0     =0
      581   01 001FD    3200098F              LW,0     =X'1000'
      582   01 001FE    69100200              BCS,1    %+2               CC4 SET?
      583   01 001FF    69200204              BCS,2    %+5               NO, CC3 SET?
      584   01 00200    65200201              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      585   01 00201    6C000000 A            RD,0     0
      586   01 00202    69100204              BCS,1    %+2
      587   01 00203    2E000000 A            WAIT                       ERROR HALT
      588   01 00204    6C000000 A            RD,0     0
      589   01 00205    694001F8              BCS,4    BLK14             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   20
A     591                            *
      592                            * BLOCK 15
      593                            *
      594                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 18 = 1
      595                            *
      596   01 00206    6C000000 A   BLK15    RD,0     0
      597   01 00207    68200209              BCR,2    %+2
      598   01 00208    2E000000 A            WAIT                       REPORT
      599   01 00209    32100990              LW,1     =X'15'
      600   01 0020A    32000979              LW,0     =0
      601   01 0020B    32000991              LW,0     =X'2000'
      602   01 0020C    6910020E              BCS,1    %+2               CC4 SET?
      603   01 0020D    69200212              BCS,2    %+5               NO, CC3 SET?
      604   01 0020E    6520020F              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      605   01 0020F    6C000000 A            RD,0     0
      606   01 00210    69100212              BCS,1    %+2
      607   01 00211    2E000000 A            WAIT                       ERROR HALT
      608   01 00212    6C000000 A            RD,0     0
      609   01 00213    69400206              BCS,4    BLK15             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   21
A     611                            *
      612                            * BLOCK 16
      613                            *
      614                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 17 = 1
      615                            *
      616   01 00214    6C000000 A   BLK16    RD,0     0
      617   01 00215    68200217              BCR,2    %+2
      618   01 00216    2E000000 A            WAIT                       REPORT
      619   01 00217    32100992              LW,1     =X'16'
      620   01 00218    32000979              LW,0     =0
      621   01 00219    32000993              LW,0     =X'4000'
      622   01 0021A    6910021C              BCS,1    %+2               CC4 SET?
      623   01 0021B    69200220              BCS,2    %+5               NO, CC3 SET?
      624   01 0021C    6520021D              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      625   01 0021D    6C000000 A            RD,0     0
      626   01 0021E    69100220              BCS,1    %+2
      627   01 0021F    2E000000 A            WAIT                       ERROR HALT
      628   01 00220    6C000000 A            RD,0     0
      629   01 00221    69400214              BCS,4    BLK16             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   22
A     631                            *
      632                            * BLOCK 17
      633                            *
      634                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 16 = 1
      635                            *
      636   01 00222    6C000000 A   BLK17    RD,0     0
      637   01 00223    68200225              BCR,2    %+2
      638   01 00224    2E000000 A            WAIT                       REPORT
      639   01 00225    32100994              LW,1     =X'17'
      640   01 00226    32000979              LW,0     =0
      641   01 00227    32000995              LW,0     =X'8000'
      642   01 00228    6910022A              BCS,1    %+2               CC4 SET?
      643   01 00229    6920022E              BCS,2    %+5               NO, CC3 SET?
      644   01 0022A    6520022B              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      645   01 0022B    6C000000 A            RD,0     0
      646   01 0022C    6910022E              BCS,1    %+2
      647   01 0022D    2E000000 A            WAIT                       ERROR HALT
      648   01 0022E    6C000000 A            RD,0     0
      649   01 0022F    69400222              BCS,4    BLK17             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   23
A     651                            *
      652                            * BLOCK 18
      653                            *
      654                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 15 = 1
      655                            *
      656   01 00230    6C000000 A   BLK18    RD,0     0
      657   01 00231    68200233              BCR,2    %+2
      658   01 00232    2E000000 A            WAIT                       REPORT
      659   01 00233    32100996              LW,1     =X'18'
      660   01 00234    32000979              LW,0     =0
      661   01 00235    32000997              LW,0     =X'10000'
      662   01 00236    69100238              BCS,1    %+2               CC4 SET?
      663   01 00237    6920023C              BCS,2    %+5               NO, CC3 SET?
      664   01 00238    65200239              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      665   01 00239    6C000000 A            RD,0     0
      666   01 0023A    6910023C              BCS,1    %+2
      667   01 0023B    2E000000 A            WAIT                       ERROR HALT
      668   01 0023C    6C000000 A            RD,0     0
      669   01 0023D    69400230              BCS,4    BLK18             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   24
A     671                            *
      672                            * BLOCK 19
      673                            *
      674                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 14 = 1
      675                            *
      676   01 0023E    6C000000 A   BLK19    RD,0     0
      677   01 0023F    68200241              BCR,2    %+2
      678   01 00240    2E000000 A            WAIT                       REPORT
      679   01 00241    32100998              LW,1     =X'19'
      680   01 00242    32000979              LW,0     =0
      681   01 00243    32000999              LW,0     =X'20000'
      682   01 00244    69100246              BCS,1    %+2               CC4 SET?
      683   01 00245    6920024A              BCS,2    %+5               NO, CC3 SET?
      684   01 00246    65200247              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      685   01 00247    6C000000 A            RD,0     0
      686   01 00248    6910024A              BCS,1    %+2
      687   01 00249    2E000000 A            WAIT                       ERROR HALT
      688   01 0024A    6C000000 A            RD,0     0
      689   01 0024B    6940023E              BCS,4    BLK19             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   25
A     691                            *
      692                            * BLOCK 20
      693                            *
      694                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 13 = 1
      695                            *
      696   01 0024C    6C000000 A   BLK20    RD,0     0
      697   01 0024D    6820024F              BCR,2    %+2
      698   01 0024E    2E000000 A            WAIT                       REPORT
      699   01 0024F    32100983              LW,1     =X'20'
      700   01 00250    32000979              LW,0     =0
      701   01 00251    3200099A              LW,0     =X'40000'
      702   01 00252    69100254              BCS,1    %+2               CC4 SET?
      703   01 00253    69200258              BCS,2    %+5               NO, CC3 SET ?
      704   01 00254    65200255              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      705   01 00255    6C000000 A            RD,0     0
      706   01 00256    69100258              BCS,1    %+2
      707   01 00257    2E000000 A            WAIT                       ERROR HALT
      708   01 00258    6C000000 A            RD,0     0
      709   01 00259    6940024C              BCS,4    BLK20             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   26
A     711                            *
      712                            * BLOCK 21
      713                            *
      714                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 12 = 1
      715                            *
      716   01 0025A    6C000000 A   BLK21    RD,0     0
      717   01 0025B    6820025D              BCR,2    %+2
      718   01 0025C    2E000000 A            WAIT                       REPORT
      719   01 0025D    3210099B              LW,1     =X'21'
      720   01 0025E    32000979              LW,0     =0
      721   01 0025F    3200099C              LW,0     =X'80000'
      722   01 00260    69100262              BCS,1    %+2               CC4 SET?
      723   01 00261    69200266              BCS,2    %+5               NO, CC3 SET?
      724   01 00262    65200263              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      725   01 00263    6C000000 A            RD,0     0
      726   01 00264    69100266              BCS,1    %+2
      727   01 00265    2E000000 A            WAIT                       ERROR HALT
      728   01 00266    6C000000 A            RD,0     0
      729   01 00267    6940025A              BCS,4    BLK21             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   27
A     731                            *
      732                            * BLOCK 22
      733                            *
      734                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 11 = 1
      735                            *
      736   01 00268    6C000000 A   BLK22    RD,0     0
      737   01 00269    6820026B              BCR,2    %+2
      738   01 0026A    2E000000 A            WAIT                       REPORT
      739   01 0026B    3210099D              LW,1     =X'22'
      740   01 0026C    32000979              LW,0     =0
      741   01 0026D    3200099E              LW,0     =X'100000'
      742   01 0026E    69100270              BCS,1    %+2               CC4 SET?
      743   01 0026F    69200274              BCS,2    %+5               NO, CC3 SET?
      744   01 00270    65200271              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      745   01 00271    6C000000 A            RD,0     0
      746   01 00272    69100274              BCS,1    %+2
      747   01 00273    2E000000 A            WAIT                       ERROR HALT
      748   01 00274    6C000000 A            RD,0     0
      749   01 00275    69400268              BCS,4    BLK22             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   28
A     751                            *
      752                            * BLOCK 23
      753                            *
      754                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 10 = 1
      755                            *
      756   01 00276    6C000000 A   BLK23    RD,0     0
      757   01 00277    68200279              BCR,2    %+2
      758   01 00278    2E000000 A            WAIT                       REPORT
      759   01 00279    3210099F              LW,1     =X'23'
      760   01 0027A    32000979              LW,0     =0
      761   01 0027B    320009A0              LW,0     =X'200000'
      762   01 0027C    6910027E              BCS,1    %+2               CC4 SET?
      763   01 0027D    69200282              BCS,2    %+5               NO, CC3 SET?
      764   01 0027E    6520027F              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      765   01 0027F    6C000000 A            RD,0     0
      766   01 00280    69100282              BCS,1    %+2
      767   01 00281    2E000000 A            WAIT                       ERROR HALT
      768   01 00282    6C000000 A            RD,0     0
      769   01 00283    69400276              BCS,4    BLK23             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   29
A     771                            *
      772                            * BLOCK 24
      773                            *
      774                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 9 = 1
      775                            *
      776   01 00284    6C000000 A   BLK24    RD,0     0
      777   01 00285    68200287              BCR,2    %+2
      778   01 00286    2E000000 A            WAIT                       REPORT
      779   01 00287    321009A1              LW,1     =X'24'
      780   01 00288    32000979              LW,0     =0
      781   01 00289    320009A2              LW,0     =X'400000'
      782   01 0028A    6910028C              BCS,1    %+2               CC4 SET?
      783   01 0028B    69200290              BCS,2    %+5               NO, CC3 SET?
      784   01 0028C    6520028D              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      785   01 0028D    6C000000 A            RD,0     0
      786   01 0028E    69100290              BCS,1    %+2
      787   01 0028F    2E000000 A            WAIT                       ERROR HALT
      788   01 00290    6C000000 A            RD,0     0
      789   01 00291    69400284              BCS,4    BLK24             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   30
A     791                            * BLOCK 25
      792                            *
      793                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 8 = 1
      794                            *
      795                            *
      796   01 00292    6C000000 A   BLK25    RD,0     0
      797   01 00293    68200295              BCR,2    %+2
      798   01 00294    2E000000 A            WAIT                       REPORT
      799   01 00295    321009A3              LW,1     =X'25'
      800   01 00296    32000979              LW,0     =0
      801   01 00297    320009A4              LW,0     =X'800000'
      802   01 00298    6910029A              BCS,1    %+2               CC4 SET?
      803   01 00299    6920029E              BCS,2    %+5               NO, CC3 SET?
      804   01 0029A    6520029B              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      805   01 0029B    6C000000 A            RD,0     0
      806   01 0029C    6910029E              BCS,1    %+2
      807   01 0029D    2E000000 A            WAIT                       ERROR HALT
      808   01 0029E    6C000000 A            RD,0     0
      809   01 0029F    69400292              BCS,4    BLK25             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   31
A     811                            *
      812                            * BLOCK 26
      813                            *
      814                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 7 = 1
      815                            *
      816   01 002A0    6C000000 A   BLK26    RD,0     0
      817   01 002A1    682002A3              BCR,2    %+2
      818   01 002A2    2E000000 A            WAIT
      819   01 002A3    321009A5              LW,1     =X'26'
      820   01 002A4    32000979              LW,0     =0
      821   01 002A5    320009A6              LW,0     =X'1000000'
      822   01 002A6    691002A8              BCS,1    %+2               CC4 SET?
      823   01 002A7    692002AC              BCS,2    %+5               NO, CC3 SET?
      824   01 002A8    652002A9              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      825   01 002A9    6C000000 A            RD,0     0
      826   01 002AA    691002AC              BCS,1    %+2
      827   01 002AB    2E000000 A            WAIT                       ERROR HALT
      828   01 002AC    6C000000 A            RD,0     0
      829   01 002AD    694002A0              BCS,4    BLK26             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   32
A     831                            *
      832                            * BLOCK 27
      833                            *
      834                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 6 = 1
      835                            *
      836   01 002AE    6C000000 A   BLK27    RD,0     0
      837   01 002AF    682002B1              BCR,2    %+2
      838   01 002B0    2E000000 A            WAIT                       REPORT
      839   01 002B1    321009A7              LW,1     =X'27'
      840   01 002B2    32000979              LW,0     =0
      841   01 002B3    320009A8              LW,0     =X'2000000'
      842   01 002B4    691002B6              BCS,1    %+2               CC4 SET?
      843   01 002B5    692002BA              BCS,2    %+5               NO, CC3 SET?
      844   01 002B6    652002B7              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      845   01 002B7    6C000000 A            RD,0     0
      846   01 002B8    691002BA              BCS,1    %+2
      847   01 002B9    2E000000 A            WAIT                       ERROR HALT
      848   01 002BA    6C000000 A            RD,0     0
      849   01 002BB    694002AE              BCS,4    BLK27             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   33
A     851                            *
      852                            * BLOCK 28
      853                            *
      854                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 5 = 1
      855                            *
      856   01 002BC    6C000000 A   BLK28    RD,0     0
      857   01 002BD    682002BF              BCR,2    %+2
      858   01 002BE    2E000000 A            WAIT
      859   01 002BF    321009A9              LW,1     =X'28'
      860   01 002C0    32000979              LW,0     =0
      861   01 002C1    320009AA              LW,0     =X'4000000'
      862   01 002C2    691002C4              BCS,1    %+2               CC4 SET?
      863   01 002C3    692002C8              BCS,2    %+5               NO, CC3 SET?
      864   01 002C4    652002C5              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      865   01 002C5    6C000000 A            RD,0     0
      866   01 002C6    691002C8              BCS,1    %+2
      867   01 002C7    2E000000 A            WAIT                       ERROR HALT
      868   01 002C8    6C000000 A            RD,0     0
      869   01 002C9    694002BC              BCS,4    BLK28             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   34
A     871                            *
      872                            * BLOCK 29
      873                            *
      874                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 4 = 1
      875                            *
      876   01 002CA    6C000000 A   BLK29    RD,0     0
      877   01 002CB    682002CD              BCR,2    %+2
      878   01 002CC    2E000000 A            WAIT                       REPORT
      879   01 002CD    321009AB              LW,1     =X'29'
      880   01 002CE    32000979              LW,0     =0
      881   01 002CF    320009AC              LW,0     =X'8000000'
      882   01 002D0    691002D2              BCS,1    %+2               CC4 SET?
      883   01 002D1    692002D6              BCS,2    %+5               NO, CC3 SET?
      884   01 002D2    652002D3              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      885   01 002D3    6C000000 A            RD,0     0
      886   01 002D4    691002D6              BCS,1    %+2
      887   01 002D5    2E000000 A            WAIT                       ERROR HALT
      888   01 002D6    6C000000 A            RD,0     0
      889   01 002D7    694002CA              BCS,4    BLK29             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   35
A     891                            *
      892                            * BLOCK 30
      893                            *
      894                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 3 = 1
      895                            *
      896   01 002D8    6C000000 A   BLK30    RD,0     0
      897   01 002D9    682002DB              BCR,2    %+2
      898   01 002DA    2E000000 A            WAIT                       REPORT
      899   01 002DB    321009AD              LW,1     =X'30'
      900   01 002DC    32000979              LW,0     =0
      901   01 002DD    320009AE              LW,0     =X'10000000'
      902   01 002DE    691002E0              BCS,1    %+2               CC4 SET
      903   01 002DF    692002E4              BCS,2    %+5               NO, CC3 SET?
      904   01 002E0    652002E1              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      905   01 002E1    6C000000 A            RD,0     0
      906   01 002E2    691002E4              BCS,1    %+2
      907   01 002E3    2E000000 A            WAIT                       ERROR HALT
      908   01 002E4    6C000000 A            RD,0     0
      909   01 002E5    694002D8              BCS,4    BLK30             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   36
A     911                            *
      912                            * BLOCK 31
      913                            *
      914                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 2 = 1
      915                            *
      916   01 002E6    6C000000 A   BLK31    RD,0     0
      917   01 002E7    682002E9              BCR,2    %+2
      918   01 002E8    2E000000 A            WAIT                       REPORT
      919   01 002E9    321009AF              LW,1     =X'31'
      920   01 002EA    32000979              LW,0     =0
      921   01 002EB    320009B0              LW,0     =X'20000000'
      922   01 002EC    691002EE              BCS,1    %+2               CC4 SET?
      923   01 002ED    692002F2              BCS,2    %+5               NO, CC3 SET?
      924   01 002EE    652002EF              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      925   01 002EF    6C000000 A            RD,0     0
      926   01 002F0    691002F2              BCS,1    %+2
      927   01 002F1    2E000000 A            WAIT                       ERROR HALT
      928   01 002F2    6C000000 A            RD,0     0
      929   01 002F3    694002E6              BCS,4    BLK31             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   37
A     931                            *
      932                            * BLOCK 32
      933                            *
      934                            * CHECK ABILITY OF LW TO SET CC3 WITH BIT 1 = 1
      935                            *
      936   01 002F4    6C000000 A   BLK32    RD,0     0
      937   01 002F5    682002F7              BCR,2    %+2
      938   01 002F6    2E000000 A            WAIT                       REPORT
      939   01 002F7    321009B1              LW,1     =X'32'
      940   01 002F8    32000979              LW,0     =0
      941   01 002F9    320009B2              LW,0     =X'40000000'
      942   01 002FA    691002FC              BCS,1    %+2               CC4 SET?
      943   01 002FB    69200300              BCS,2    %+5               NO, CC3 SET?
      944   01 002FC    652002FD              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
      945   01 002FD    6C000000 A            RD,0     0
      946   01 002FE    69100300              BCS,1    %+2
      947   01 002FF    2E000000 A            WAIT                       ERROR HALT
      948   01 00300    6C000000 A            RD,0     0
      949   01 00301    694002F4              BCS,4    BLK32             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   38
A     951                            *
      952                            * BLOCK 33
      953                            *
      954                            * CHECK ABILITY OF LW TO SET CC4 WITH BIT 0 = 1
      955                            *
      956   01 00302    6C000000 A   BLK33    RD,0     0
      957   01 00303    68200305              BCR,2    %+2
      958   01 00304    2E000000 A            WAIT                       REPORT
      959   01 00305    321009B3              LW,1     =X'33'
      960   01 00306    32000979              LW,0     =0
      961   01 00307    320009B4              LW,0     =X'80000000'
      962   01 00308    6810030A              BCR,1    %+2               CC4 SET?
      963   01 00309    6820030E              BCR,2    %+5               YES, CC3 SET?
      964   01 0030A    6520030B              BIR,2    %+1               ERROR - CC3 SET/CC4 RESET
      965   01 0030B    6C000000 A            RD,0     0
      966   01 0030C    6910030E              BCS,1    %+2
      967   01 0030D    2E000000 A            WAIT                       ERROR HALT
      968   01 0030E    6C000000 A            RD,0     0
      969   01 0030F    69400302              BCS,4    BLK33             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   39
A     971                            *
      972                            * BLOCK 34
      973                            *
      974                            * CHECK ABILITY OF LW TO RESET CC4 WITH ALL BITS = ZERO
      975                            *
      976   01 00310    6C000000 A   BLK34    RD,0     0
      977   01 00311    68200313              BCR,2    %+2
      978   01 00312    2E000000 A            WAIT                       REPORT
      979   01 00313    321009B5              LW,1     =X'34'
      980   01 00314    320009B4              LW,0     =X'80000000'
      981   01 00315    32000979              LW,0     =0
      982   01 00316    69100318              BCS,1    %+2               CC4 SET?
      983   01 00317    6820031C              BCR,2    %+5               NO, CC3 SET?
      984   01 00318    65200319              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
      985   01 00319    6C000000 A            RD,0     0
      986   01 0031A    6910031C              BCS,1    %+2
      987   01 0031B    2E000000 A            WAIT                       ERROR HALT
      988   01 0031C    6C000000 A            RD,0     0
      989   01 0031D    69400310              BCS,4    BLK34             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   40
A     991                            *
      992                            * BLOCK 35
      993                            *
      994                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC3 AND NOT SET CC4 WITH
      995                            *    ALL BITS = ZERO
      996                            *
      997   01 0031E    6C000000 A   BLK35    RD,0     0
      998   01 0031F    68200321              BCR,2    %+2
      999   01 00320    2E000000 A            WAIT                       REPORT
     1000   01 00321    321009B6              LW,1     =X'35'
     1001   01 00322    32000979              LW,0     =0
     1002   01 00323    48000979              EOR,0    =0
     1003   01 00324    69100326              BCS,1    %+2               CC4 SET?
     1004   01 00325    6820032A              BCR,2    %+5               NO, CC3 SET?
     1005   01 00326    65200327              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1006   01 00327    6C000000 A            RD,0     0
     1007   01 00328    6910032A              BCS,1    %+2
     1008   01 00329    2E000000 A            WAIT                       ERROR HALT
     1009   01 0032A    6C000000 A            RD,0     0
     1010   01 0032B    6940031E              BCS,4    BLK35             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   41
A    1012                            *
     1013                            * BLOCK 36
     1014                            *
     1015                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC4 AND NOT SET CC3 WITH
     1016                            *    ALL BITS = 1
     1017                            *
     1018   01 0032C    6C000000 A   BLK36    RD,0     0
     1019   01 0032D    6820032F              BCR,2    %+2
     1020   01 0032E    2E000000 A            WAIT                       REPORT
     1021   01 0032F    321009B7              LW,1     =X'36'
     1022   01 00330    32000979              LW,0     =0
     1023   01 00331    320009B8              LW,0     =-1
     1024   01 00332    480009B8              EOR,0    =-1
     1025   01 00333    69100335              BCS,1    %+2               CC4 SET?
     1026   01 00334    68200339              BCR,2    %+5               NO, CC3 SET?
     1027   01 00335    65200336              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1028   01 00336    6C000000 A            RD,0     0
     1029   01 00337    69100339              BCS,1    %+2
     1030   01 00338    2E000000 A            WAIT                       ERROR HALT
     1031   01 00339    6C000000 A            RD,0     0
     1032   01 0033A    6940032C              BCS,4    BLK36             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   42
A    1034                            *
     1035                            * BLOCK 37
     1036                            *
     1037                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 31 = 1
     1038                            *
     1039   01 0033B    6C000000 A   BLK37    RD,0     0
     1040   01 0033C    6820033E              BCR,2    %+2
     1041   01 0033D    2E000000 A            WAIT                       REPORT
     1042   01 0033E    321009B9              LW,1     =X'37'
     1043   01 0033F    32000979              LW,0     =0
     1044   01 00340    4800097A              EOR,0    =X'1'
     1045   01 00341    69100343              BCS,1    %+2               CC4 SET?
     1046   01 00342    69200347              BCS,2    %+5               NO, CC3 SET?
     1047   01 00343    65200344              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1048   01 00344    6C000000 A            RD,0     0
     1049   01 00345    69100347              BCS,1    %+2
     1050   01 00346    2E000000 A            WAIT                       ERROR HALT
     1051   01 00347    6C000000 A            RD,0     0
     1052   01 00348    6940033B              BCS,4    BLK37             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   43
A    1054                            *
     1055                            * BLOCK 38
     1056                            *
     1057                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 30 = 1
     1058                            *
     1059   01 00349    6C000000 A   BLK38    RD,0     0
     1060   01 0034A    6820034C              BCR,2    %+2
     1061   01 0034B    2E000000 A            WAIT                       REPORT
     1062   01 0034C    321009BA              LW,1     =X'38'
     1063   01 0034D    32000979              LW,0     =0
     1064   01 0034E    4800097B              EOR,0    =X'2'
     1065   01 0034F    69100351              BCS,1    %+2               CC4 SET?
     1066   01 00350    69200355              BCS,2    %+5               NO, CC3 SET?
     1067   01 00351    65200352              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1068   01 00352    6C000000 A            RD,0     0
     1069   01 00353    69100355              BCS,1    %+2
     1070   01 00354    2E000000 A            WAIT                       ERROR HALT
     1071   01 00355    6C000000 A            RD,0     0
     1072   01 00356    69400349              BCS,4    BLK38             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   44
A    1074                            *
     1075                            * BLOCK 39
     1076                            *
     1077                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 29 = 1
     1078                            *
     1079   01 00357    6C000000 A   BLK39    RD,0     0
     1080   01 00358    6820035A              BCR,2    %+2
     1081   01 00359    2E000000 A            WAIT                       REPORT
     1082   01 0035A    321009BB              LW,1     =X'39'
     1083   01 0035B    32000979              LW,0     =0
     1084   01 0035C    4800097D              EOR,0    =X'4'
     1085   01 0035D    6910035F              BCS,1    %+2               CC4 SET?
     1086   01 0035E    69200363              BCS,2    %+5               NO, CC3 SET?
     1087   01 0035F    65200360              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1088   01 00360    6C000000 A            RD,0     0
     1089   01 00361    69100363              BCS,1    %+2
     1090   01 00362    2E000000 A            WAIT                       ERROR HALT
     1091   01 00363    6C000000 A            RD,0     0
     1092   01 00364    69400357              BCS,4    BLK39             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   45
A    1094                            *
     1095                            * BLOCK 40
     1096                            *
     1097                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 28 = 1
     1098                            *
     1099   01 00365    6C000000 A   BLK40    RD,0     0
     1100   01 00366    68200368              BCR,2    %+2
     1101   01 00367    2E000000 A            WAIT                       REPORT
     1102   01 00368    32100984              LW,1     =X'40'
     1103   01 00369    32000979              LW,0     =0
     1104   01 0036A    4800097F              EOR,0    =X'8'
     1105   01 0036B    6910036D              BCS,1    %+2               CC4 SET?
     1106   01 0036C    69200371              BCS,2    %+5               NO, CC3 SET?
     1107   01 0036D    6520036E              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1108   01 0036E    6C000000 A            RD,0     0
     1109   01 0036F    69100371              BCS,1    %+2
     1110   01 00370    2E000000 A            WAIT                       ERROR HALT
     1111   01 00371    6C000000 A            RD,0     0
     1112   01 00372    69400365              BCS,4    BLK40             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   46
A    1114                            *
     1115                            * BLOCK 41
     1116                            *
     1117                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 27 = 1
     1118                            *
     1119   01 00373    6C000000 A   BLK41    RD,0     0
     1120   01 00374    68200376              BCR,2    %+2
     1121   01 00375    2E000000 A            WAIT                       REPORT
     1122   01 00376    321009BC              LW,1     =X'41'
     1123   01 00377    32000979              LW,0     =0
     1124   01 00378    48000981              EOR,0    =X'10'
     1125   01 00379    6910037B              BCS,1    %+2               CC4 SET?
     1126   01 0037A    6920037F              BCS,2    %+5               NO, CC3 SET?
     1127   01 0037B    6520037C              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1128   01 0037C    6C000000 A            RD,0     0
     1129   01 0037D    6910037F              BCS,1    %+2
     1130   01 0037E    2E000000 A            WAIT                       ERROR HALT
     1131   01 0037F    6C000000 A            RD,0     0
     1132   01 00380    69400373              BCS,4    BLK41             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   47
A    1134                            *
     1135                            * BLOCK 42
     1136                            *
     1137                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 26 = 1
     1138                            *
     1139   01 00381    6C000000 A   BLK42    RD,0     0
     1140   01 00382    68200384              BCR,2    %+2
     1141   01 00383    2E000000 A            WAIT                       REPORT
     1142   01 00384    321009BD              LW,1     =X'42'
     1143   01 00385    32000979              LW,0     =0
     1144   01 00386    48000983              EOR,0    =X'20'
     1145   01 00387    69100389              BCS,1    %+2               CC4 SET?
     1146   01 00388    6920038D              BCS,2    %+5               NO, CC3 SET?
     1147   01 00389    6520038A              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1148   01 0038A    6C000000 A            RD,0     0
     1149   01 0038B    6910038D              BCS,1    %+2
     1150   01 0038C    2E000000 A            WAIT                       ERROR HALT
     1151   01 0038D    6C000000 A            RD,0     0
     1152   01 0038E    69400381              BCS,4    BLK42             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   48
A    1154                            *
     1155                            * BLOCK 43
     1156                            *
     1157                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 25 = 1
     1158                            *
     1159   01 0038F    6C000000 A   BLK43    RD,0     0
     1160   01 00390    68200392              BCR,2    %+2
     1161   01 00391    2E000000 A            WAIT                       REPORT
     1162   01 00392    321009BE              LW,1     =X'43'
     1163   01 00393    32000979              LW,0     =0
     1164   01 00394    48000984              EOR,0    =X'40'
     1165   01 00395    69100397              BCS,1    %+2               CC4 SET?
     1166   01 00396    6920039B              BCS,2    %+5               NO, CC3 SET?
     1167   01 00397    65200398              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1168   01 00398    6C000000 A            RD,0     0
     1169   01 00399    6910039B              BCS,1    %+2
     1170   01 0039A    2E000000 A            WAIT                       ERROR HALT
     1171   01 0039B    6C000000 A            RD,0     0
     1172   01 0039C    6940038F              BCS,4    BLK43             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   49
A    1174                            *
     1175                            * BLOCK 44
     1176                            *
     1177                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 24 = 1
     1178                            *
     1179   01 0039D    6C000000 A   BLK44    RD,0     0
     1180   01 0039E    682003A0              BCR,2    %+2
     1181   01 0039F    2E000000 A            WAIT                       REPORT
     1182   01 003A0    321009BF              LW,1     =X'44'
     1183   01 003A1    32000979              LW,0     =0
     1184   01 003A2    48000986              EOR,0    =X'80'
     1185   01 003A3    691003A5              BCS,1    %+2               CC4 SET?
     1186   01 003A4    692003A9              BCS,2    %+5               NO, CC3 SET?
     1187   01 003A5    652003A6              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1188   01 003A6    6C000000 A            RD,0     0
     1189   01 003A7    691003A9              BCS,1    %+2
     1190   01 003A8    2E000000 A            WAIT                       ERROR HALT
     1191   01 003A9    6C000000 A            RD,0     0
     1192   01 003AA    6940039D              BCS,4    BLK44             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   50
A    1194                            *
     1195                            * BLOCK 45
     1196                            *
     1197                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 23 = 1
     1198                            *
     1199   01 003AB    6C000000 A   BLK45    RD,0     0
     1200   01 003AC    682003AE              BCR,2    %+2
     1201   01 003AD    2E000000 A            WAIT                       REPORT
     1202   01 003AE    321009C0              LW,1     =X'45'
     1203   01 003AF    32000979              LW,0     =0
     1204   01 003B0    48000987              EOR,0    =X'100'
     1205   01 003B1    691003B3              BCS,1    %+2               CC4 SET?
     1206   01 003B2    692003B7              BCS,2    %+5               NO, CC3 SET?
     1207   01 003B3    652003B4              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1208   01 003B4    6C000000 A            RD,0     0
     1209   01 003B5    691003B7              BCS,1    %+2
     1210   01 003B6    2E000000 A            WAIT                       ERROR HALT
     1211   01 003B7    6C000000 A            RD,0     0
     1212   01 003B8    694003AB              BCS,4    BLK45             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   51
A    1214                            *
     1215                            * BLOCK 46
     1216                            *
     1217                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 22 = 1
     1218                            *
     1219   01 003B9    6C000000 A   BLK46    RD,0     0
     1220   01 003BA    682003BC              BCR,2    %+2
     1221   01 003BB    2E000000 A            WAIT                       REPORT
     1222   01 003BC    321009C1              LW,1     =X'46'
     1223   01 003BD    32000979              LW,0     =0
     1224   01 003BE    48000989              EOR,0    =X'200'
     1225   01 003BF    691003C1              BCS,1    %+2               CC4 SET?
     1226   01 003C0    692003C5              BCS,2    %+5               NO, CC3 SET?
     1227   01 003C1    652003C2              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1228   01 003C2    6C000000 A            RD,0     0
     1229   01 003C3    691003C5              BCS,1    %+2
     1230   01 003C4    2E000000 A            WAIT                       ERROR HALT
     1231   01 003C5    6C000000 A            RD,0     0
     1232   01 003C6    694003B9              BCS,4    BLK46             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   52
A    1234                            *
     1235                            * BLOCK 47
     1236                            *
     1237                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 21 = 1
     1238                            *
     1239   01 003C7    6C000000 A   BLK47    RD,0     0
     1240   01 003C8    682003CA              BCR,2    %+2
     1241   01 003C9    2E000000 A            WAIT                       REPORT
     1242   01 003CA    321009C2              LW,1     =X'47'
     1243   01 003CB    32000979              LW,0     =0
     1244   01 003CC    4800098B              EOR,0    =X'400'
     1245   01 003CD    691003CF              BCS,1    %+2               CC4 SET?
     1246   01 003CE    692003D3              BCS,2    %+5               NO, CC3 SET?
     1247   01 003CF    652003D0              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1248   01 003D0    6C000000 A            RD,0     0
     1249   01 003D1    691003D3              BCS,1    %+2
     1250   01 003D2    2E000000 A            WAIT                       ERROR HALT
     1251   01 003D3    6C000000 A            RD,0     0
     1252   01 003D4    694003C7              BCS,4    BLK47             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   53
A    1254                            *
     1255                            * BLOCK 48
     1256                            *
     1257                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 20 = 1
     1258                            *
     1259   01 003D5    6C000000 A   BLK48    RD,0     0
     1260   01 003D6    682003D8              BCR,2    %+2
     1261   01 003D7    2E000000 A            WAIT                       REPORT
     1262   01 003D8    321009C3              LW,1     =X'48'
     1263   01 003D9    32000979              LW,0     =0
     1264   01 003DA    4800098D              EOR,0    =X'800'
     1265   01 003DB    691003DD              BCS,1    %+2               CC4 SET?
     1266   01 003DC    692003E1              BCS,2    %+5               NO, CC3 SET?
     1267   01 003DD    652003DE              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1268   01 003DE    6C000000 A            RD,0     0
     1269   01 003DF    691003E1              BCS,1    %+2
     1270   01 003E0    2E000000 A            WAIT                       ERROR HALT
     1271   01 003E1    6C000000 A            RD,0     0
     1272   01 003E2    694003D5              BCS,4    BLK48             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   54
A    1274                            *
     1275                            * BLOCK 49
     1276                            *
     1277                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 19 = 1
     1278                            *
     1279   01 003E3    6C000000 A   BLK49    RD,0     0
     1280   01 003E4    682003E6              BCR,2    %+2
     1281   01 003E5    2E000000 A            WAIT                       REPORT
     1282   01 003E6    321009C4              LW,1     =X'49'
     1283   01 003E7    32000979              LW,0     =0
     1284   01 003E8    4800098F              EOR,0    =X'1000'
     1285   01 003E9    691003EB              BCS,1    %+2               CC4 SET?
     1286   01 003EA    692003EF              BCS,2    %+5               NO, CC3 SET?
     1287   01 003EB    652003EC              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1288   01 003EC    6C000000 A            RD,0     0
     1289   01 003ED    691003EF              BCS,1    %+2
     1290   01 003EE    2E000000 A            WAIT                       ERROR HALT
     1291   01 003EF    6C000000 A            RD,0     0
     1292   01 003F0    694003E3              BCS,4    BLK49             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   55
A    1294                            *
     1295                            * BLOCK 50
     1296                            *
     1297                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 18 = 1
     1298                            *
     1299   01 003F1    6C000000 A   BLK50    RD,0     0
     1300   01 003F2    682003F4              BCR,2    %+2
     1301   01 003F3    2E000000 A            WAIT                       REPORT
     1302   01 003F4    321009C5              LW,1     =X'50'
     1303   01 003F5    32000979              LW,0     =0
     1304   01 003F6    48000991              EOR,0    =X'2000'
     1305   01 003F7    691003F9              BCS,1    %+2               CC4 SET?
     1306   01 003F8    692003FD              BCS,2    %+5               NO, CC3 SET?
     1307   01 003F9    652003FA              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1308   01 003FA    6C000000 A            RD,0     0
     1309   01 003FB    691003FD              BCS,1    %+2
     1310   01 003FC    2E000000 A            WAIT                       ERROR HALT
     1311   01 003FD    6C000000 A            RD,0     0
     1312   01 003FE    694003F1              BCS,4    BLK50             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   56
A    1314                            *
     1315                            * BLOCK 51
     1316                            *
     1317                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 17 = 1
     1318                            *
     1319   01 003FF    6C000000 A   BLK51    RD,0     0
     1320   01 00400    68200402              BCR,2    %+2
     1321   01 00401    2E000000 A            WAIT                       REPORT
     1322   01 00402    321009C6              LW,1     =X'51'
     1323   01 00403    32000979              LW,0     =0
     1324   01 00404    48000993              EOR,0    =X'4000'
     1325   01 00405    69100407              BCS,1    %+2               CC4 SET?
     1326   01 00406    6920040B              BCS,2    %+5               NO, CC3 SET?
     1327   01 00407    65200408              BIR,2    %+1               ERROE - CC3 RESET/CC4 SET
     1328   01 00408    6C000000 A            RD,0     0
     1329   01 00409    6910040B              BCS,1    %+2
     1330   01 0040A    2E000000 A            WAIT                       ERROR HALT
     1331   01 0040B    6C000000 A            RD,0     0
     1332   01 0040C    694003FF              BCS,4    BLK51             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   57
A    1334                            *
     1335                            * BLOCK 52
     1336                            *
     1337                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 16 = 1
     1338                            *
     1339   01 0040D    6C000000 A   BLK52    RD,0     0
     1340   01 0040E    68200410              BCR,2    %+2
     1341   01 0040F    2E000000 A            WAIT                       REPORT
     1342   01 00410    321009C7              LW,1     =X'52'
     1343   01 00411    32000979              LW,0     =0
     1344   01 00412    48000995              EOR,0    =X'8000'
     1345   01 00413    69100415              BCS,1    %+2               CC4 SET?
     1346   01 00414    69200419              BCS,2    %+5               NO, CC3 SET?
     1347   01 00415    65200416              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1348   01 00416    6C000000 A            RD,0     0
     1349   01 00417    69100419              BCS,1    %+2
     1350   01 00418    2E000000 A            WAIT                       ERROR HALT
     1351   01 00419    6C000000 A            RD,0     0
     1352   01 0041A    6940040D              BCS,4    BLK52             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   58
A    1354                            *
     1355                            * BLOCK 53
     1356                            *
     1357                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 15 = 1
     1358                            *
     1359   01 0041B    6C000000 A   BLK53    RD,0     0
     1360   01 0041C    6820041E              BCR,2    %+2
     1361   01 0041D    2E000000 A            WAIT                       REPORT
     1362   01 0041E    321009C8              LW,1     =X'53'
     1363   01 0041F    32000979              LW,0     =0
     1364   01 00420    48000997              EOR,0    =X'10000'
     1365   01 00421    69100423              BCS,1    %+2               CC4 SET?
     1366   01 00422    69200427              BCS,2    %+5               NO, CC3 SET?
     1367   01 00423    65200424              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1368   01 00424    6C000000 A            RD,0     0
     1369   01 00425    69100427              BCS,1    %+2
     1370   01 00426    2E000000 A            WAIT                       ERROR HALT
     1371   01 00427    6C000000 A            RD,0     0
     1372   01 00428    6940041B              BCS,4    BLK53             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   59
A    1374                            *
     1375                            * BLOCK 54
     1376                            *
     1377                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 14 = 1
     1378                            *
     1379   01 00429    6C000000 A   BLK54    RD,0     0
     1380   01 0042A    6820042C              BCR,2    %+2
     1381   01 0042B    2E000000 A            WAIT                       REPORT
     1382   01 0042C    321009C9              LW,1     =X'54'
     1383   01 0042D    32000979              LW,0     =0
     1384   01 0042E    48000999              EOR,0    =X'20000'
     1385   01 0042F    69100431              BCS,1    %+2               CC4 SET?
     1386   01 00430    69200435              BCS,2    %+5               NO, CC3 SET?
     1387   01 00431    65200432              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1388   01 00432    6C000000 A            RD,0     0
     1389   01 00433    69100435              BCS,1    %+2
     1390   01 00434    2E000000 A            WAIT                       ERROR HALT
     1391   01 00435    6C000000 A            RD,0     0
     1392   01 00436    69400429              BCS,4    BLK54             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   60
A    1394                            *
     1395                            * BLOCK 55
     1396                            *
     1397                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 13 = 1
     1398                            *
     1399   01 00437    6C000000 A   BLK55    RD,0     0
     1400   01 00438    6820043A              BCR,2    %+2
     1401   01 00439    2E000000 A            WAIT                       REPORT
     1402   01 0043A    321009CA              LW,1     =X'55'
     1403   01 0043B    32000979              LW,0     =0
     1404   01 0043C    4800099A              EOR,0    =X'40000'
     1405   01 0043D    6910043F              BCS,1    %+2               CC4 SET
     1406   01 0043E    69200443              BCS,2    %+5               NO, CC3 SET?
     1407   01 0043F    65200440              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1408   01 00440    6C000000 A            RD,0     0
     1409   01 00441    69100443              BCS,1    %+2
     1410   01 00442    2E000000 A            WAIT                       ERROR HALT
     1411   01 00443    6C000000 A            RD,0     0
     1412   01 00444    69400437              BCS,4    BLK55             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   61
A    1414                            *
     1415                            * BLOCK 56
     1416                            *
     1417                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 12 = 1
     1418                            *
     1419   01 00445    6C000000 A   BLK56    RD,0     0
     1420   01 00446    68200448              BCR,2    %+2
     1421   01 00447    2E000000 A            WAIT                       REPORT
     1422   01 00448    321009CB              LW,1     =X'56'
     1423   01 00449    32000979              LW,0     =0
     1424   01 0044A    4800099C              EOR,0    =X'80000'
     1425   01 0044B    6910044D              BCS,1    %+2               CC4 SET?
     1426   01 0044C    69200451              BCS,2    %+5               NO, CC3 SET?
     1427   01 0044D    6520044E              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1428   01 0044E    6C000000 A            RD,0     0
     1429   01 0044F    69100451              BCS,1    %+2
     1430   01 00450    2E000000 A            WAIT                       ERROR HALT
     1431   01 00451    6C000000 A            RD,0     0
     1432   01 00452    69400445              BCS,4    BLK56             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   62
A    1434                            *
     1435                            * BLOCK 57
     1436                            *
     1437                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 11 = 1
     1438                            *
     1439   01 00453    6C000000 A   BLK57    RD,0     0
     1440   01 00454    68200456              BCR,2    %+2
     1441   01 00455    2E000000 A            WAIT                       REPORT
     1442   01 00456    321009CC              LW,1     =X'57'
     1443   01 00457    32000979              LW,0     =0
     1444   01 00458    4800099E              EOR,0    =X'100000'
     1445   01 00459    6910045B              BCS,1    %+2               CC4 SET?
     1446   01 0045A    6920045F              BCS,2    %+5               NO, CC3 SET?
     1447   01 0045B    6520045C              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1448   01 0045C    6C000000 A            RD,0     0
     1449   01 0045D    6910045F              BCS,1    %+2
     1450   01 0045E    2E000000 A            WAIT                       ERROR HALT
     1451   01 0045F    6C000000 A            RD,0     0
     1452   01 00460    69400453              BCS,4    BLK57             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   63
A    1454                            *
     1455                            * BLOCK 58
     1456                            *
     1457                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 10 = 1
     1458                            *
     1459   01 00461    6C000000 A   BLK58    RD,0     0
     1460   01 00462    68200464              BCR,2    %+2
     1461   01 00463    2E000000 A            WAIT                       REPORT
     1462   01 00464    321009CD              LW,1     =X'58'
     1463   01 00465    32000979              LW,0     =0
     1464   01 00466    480009A0              EOR,0    =X'200000'
     1465   01 00467    69100469              BCS,1    %+2               CC4 SET?
     1466   01 00468    6920046D              BCS,2    %+5               NO, CC3 SET?
     1467   01 00469    6520046A              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1468   01 0046A    6C000000 A            RD,0     0
     1469   01 0046B    6910046D              BCS,1    %+2
     1470   01 0046C    2E000000 A            WAIT                       ERROR HALT
     1471   01 0046D    6C000000 A            RD,0     0
     1472   01 0046E    69400461              BCS,4    BLK58             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   64
A    1474                            *
     1475                            * BLOCK 59
     1476                            *
     1477                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 9 = 1
     1478                            *
     1479   01 0046F    6C000000 A   BLK59    RD,0     0
     1480   01 00470    68200472              BCR,2    %+2
     1481   01 00471    2E000000 A            WAIT                       REPORT
     1482   01 00472    321009CE              LW,1     =X'59'
     1483   01 00473    32000979              LW,0     =0
     1484   01 00474    480009A2              EOR,0    =X'400000'
     1485   01 00475    69100477              BCS,1    %+2               CC4 SET?
     1486   01 00476    6920047B              BCS,2    %+5               NO, CC3 SET?
     1487   01 00477    65200478              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1488   01 00478    6C000000 A            RD,0     0
     1489   01 00479    6910047B              BCS,1    %+2
     1490   01 0047A    2E000000 A            WAIT                       ERROR HALT
     1491   01 0047B    6C000000 A            RD,0     0
     1492   01 0047C    6940046F              BCS,4    BLK59             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   65
A    1494                            *
     1495                            * BLOCK 60
     1496                            *
     1497                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 8 = 1
     1498                            *
     1499   01 0047D    6C000000 A   BLK60    RD,0     0
     1500   01 0047E    68200480              BCR,2    %+2
     1501   01 0047F    2E000000 A            WAIT                       REPORT
     1502   01 00480    321009CF              LW,1     =X'60'
     1503   01 00481    32000979              LW,0     =0
     1504   01 00482    480009A4              EOR,0    =X'800000'
     1505   01 00483    69100485              BCS,1    %+2               CC4 SET
     1506   01 00484    69200489              BCS,2    %+5               NO, CC3 SET?
     1507   01 00485    65200486              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1508   01 00486    6C000000 A            RD,0     0
     1509   01 00487    69100489              BCS,1    %+2
     1510   01 00488    2E000000 A            WAIT                       ERROR HALT
     1511   01 00489    6C000000 A            RD,0     0
     1512   01 0048A    6940047D              BCS,4    BLK60             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   66
A    1514                            *
     1515                            * BLOCK 61
     1516                            *
     1517                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 7 = 1
     1518                            *
     1519   01 0048B    6C000000 A   BLK61    RD,0     0
     1520   01 0048C    6820048E              BCR,2    %+2
     1521   01 0048D    2E000000 A            WAIT                       REPORT
     1522   01 0048E    321009D0              LW,1     =X'61'
     1523   01 0048F    32000979              LW,0     =0
     1524   01 00490    480009A6              EOR,0    =X'1000000'
     1525   01 00491    69100493              BCS,1    %+2               CC4 SET?
     1526   01 00492    69200497              BCS,2    %+5               NO, CC3 SET?
     1527   01 00493    65200494              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1528   01 00494    6C000000 A            RD,0     0
     1529   01 00495    69100497              BCS,1    %+2
     1530   01 00496    2E000000 A            WAIT                       ERROR HALT
     1531   01 00497    6C000000 A            RD,0     0
     1532   01 00498    6940048B              BCS,4    BLK61             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   67
A    1534                            *
     1535                            * BLOCK 62
     1536                            *
     1537                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 6 = 1
     1538                            *
     1539   01 00499    6C000000 A   BLK62    RD,0     0
     1540   01 0049A    6820049C              BCR,2    %+2
     1541   01 0049B    2E000000 A            WAIT                       REPORT
     1542   01 0049C    321009D1              LW,1     =X'62'
     1543   01 0049D    32000979              LW,0     =0
     1544   01 0049E    480009A8              EOR,0    =X'2000000'
     1545   01 0049F    691004A1              BCS,1    %+2               CC4 SET?
     1546   01 004A0    692004A5              BCS,2    %+5               NO, CC3 SET?
     1547   01 004A1    652004A2              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1548   01 004A2    6C000000 A            RD,0     0
     1549   01 004A3    691004A5              BCS,1    %+2
     1550   01 004A4    2E000000 A            WAIT                       ERROR HALT
     1551   01 004A5    6C000000 A            RD,0     0
     1552   01 004A6    69400499              BCS,4    BLK62             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   68
A    1554                            *
     1555                            * BLOCK 63
     1556                            *
     1557                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 5 = 1
     1558                            *
     1559   01 004A7    6C000000 A   BLK63    RD,0     0
     1560   01 004A8    682004AA              BCR,2    %+2
     1561   01 004A9    2E000000 A            WAIT                       REPORT
     1562   01 004AA    321009D2              LW,1     =X'63'
     1563   01 004AB    32000979              LW,0     =0
     1564   01 004AC    480009AA              EOR,0    =X'4000000'
     1565   01 004AD    691004AF              BCS,1    %+2               CC4 SET?
     1566   01 004AE    692004B3              BCS,2    %+5               NO, CC3 SET?
     1567   01 004AF    652004B0              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1568   01 004B0    6C000000 A            RD,0     0
     1569   01 004B1    691004B3              BCS,1    %+2
     1570   01 004B2    2E000000 A            WAIT                       ERROR HALT
     1571   01 004B3    6C000000 A            RD,0     0
     1572   01 004B4    694004A7              BCS,4    BLK63             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   69
A    1574                            *
     1575                            * BLOCK 64
     1576                            *
     1577                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 4 = 1
     1578                            *
     1579   01 004B5    6C000000 A   BLK64    RD,0     0
     1580   01 004B6    682004B8              BCR,2    %+2
     1581   01 004B7    2E000000 A            WAIT                       REPORT
     1582   01 004B8    321009D3              LW,1     =X'64'
     1583   01 004B9    32000979              LW,0     =0
     1584   01 004BA    480009AC              EOR,0    =X'8000000'
     1585   01 004BB    691004BD              BCS,1    %+2               CC4 SET?
     1586   01 004BC    692004C1              BCS,2    %+5               NO, CC3 SET?
     1587   01 004BD    652004BE              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1588   01 004BE    6C000000 A            RD,0     0
     1589   01 004BF    691004C1              BCS,1    %+2
     1590   01 004C0    2E000000 A            WAIT                       ERROR HALT
     1591   01 004C1    6C000000 A            RD,0     0
     1592   01 004C2    694004B5              BCS,4    BLK64             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   70
A    1594                            *
     1595                            * BLOCK 65
     1596                            *
     1597                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 3 = 1
     1598                            *
     1599   01 004C3    6C000000 A   BLK65    RD,0     0
     1600   01 004C4    682004C6              BCR,2    %+2
     1601   01 004C5    2E000000 A            WAIT                       REPORT
     1602   01 004C6    321009D4              LW,1     =X'65'
     1603   01 004C7    32000979              LW,0     =0
     1604   01 004C8    480009AE              EOR,0    =X'10000000'
     1605   01 004C9    691004CB              BCS,1    %+2               CC4 SET?
     1606   01 004CA    692004CF              BCS,2    %+5               NO, CC3 SET?
     1607   01 004CB    652004CC              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1608   01 004CC    6C000000 A            RD,0     0
     1609   01 004CD    691004CF              BCS,1    %+2
     1610   01 004CE    2E000000 A            WAIT                       ERROR WAIT
     1611   01 004CF    6C000000 A            RD,0     0
     1612   01 004D0    694004C3              BCS,4    BLK65             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   71
A    1614                            *
     1615                            * BLOCK 66
     1616                            *
     1617                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 2 = 1
     1618                            *
     1619   01 004D1    6C000000 A   BLK66    RD,0     0
     1620   01 004D2    682004D4              BCR,2    %+2
     1621   01 004D3    2E000000 A            WAIT                       REPORT
     1622   01 004D4    321009D5              LW,1     =X'66'
     1623   01 004D5    32000979              LW,0     =0
     1624   01 004D6    480009B0              EOR,0    =X'20000000'
     1625   01 004D7    691004D9              BCS,1    %+2               CC4 SET?
     1626   01 004D8    692004DD              BCS,2    %+5               NO, CC3 SET?
     1627   01 004D9    652004DA              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1628   01 004DA    6C000000 A            RD,0     0
     1629   01 004DB    691004DD              BCS,1    %+2
     1630   01 004DC    2E000000 A            WAIT                       ERROR HALT
     1631   01 004DD    6C000000 A            RD,0     0
     1632   01 004DE    694004D1              BCS,4    BLK66             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   72
A    1634                            *
     1635                            * BLOCK 67
     1636                            *
     1637                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC3 WITH BIT 1 = 1
     1638                            *
     1639   01 004DF    6C000000 A   BLK67    RD,0     0
     1640   01 004E0    682004E2              BCR,2    %+2
     1641   01 004E1    2E000000 A            WAIT                       REPORT
     1642   01 004E2    321009D6              LW,1     =X'67'
     1643   01 004E3    32000979              LW,0     =0
     1644   01 004E4    480009B2              EOR,0    =X'40000000'
     1645   01 004E5    691004E7              BCS,1    %+2               CC4 SET?
     1646   01 004E6    692004EB              BCS,2    %+5               NO, CC3 SET?
     1647   01 004E7    652004E8              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1648   01 004E8    6C000000 A            RD,0     0
     1649   01 004E9    691004EB              BCS,1    %+2
     1650   01 004EA    2E000000 A            WAIT                       ERROR HALT
     1651   01 004EB    6C000000 A            RD,0     0
     1652   01 004EC    694004DF              BCS,4    BLK67             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   73
A    1654                            *
     1655                            * BLOCK 68
     1656                            *
     1657                            * CHECK ABILITY OF LW-EOR SEQUENCE TO SET CC4 AND RESET CC3 WITH BIT0 =1
     1658                            *
     1659   01 004ED    6C000000 A   BLK68    RD,0     0
     1660   01 004EE    682004F0              BCR,2    %+2
     1661   01 004EF    2E000000 A            WAIT                       REPORT
     1662   01 004F0    32000979              LW,0     =0                RESET CC3, CC4
     1663   01 004F1    321009D7              LW,1     =X'68'
     1664   01 004F2    480009B4              EOR,0    =X'80000000'      SET CC4 AND RESET CC3
     1665   01 004F3    681004F5              BCR,1    %+2               CC4 SET?
     1666   01 004F4    682004F9              BCR,2    %+5               YES, CC3 SET?
     1667   01 004F5    652004F6              BIR,2    %+1               ERROR - CC4 RESET/CC3 SET
     1668   01 004F6    6C000000 A            RD,0     0
     1669   01 004F7    691004F9              BCS,1    %+2
     1670   01 004F8    2E000000 A            WAIT                       ERROR HALT
     1671   01 004F9    6C000000 A            RD,0     0
     1672   01 004FA    694004ED              BCS,4    BLK68             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   74
A    1674                            *
     1675                            * BLOCK 69
     1676                            *
     1677                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC4 WITH EVEN BITS = 1
     1678                            *
     1679   01 004FB    6C000000 A   BLK69    RD,0     0
     1680   01 004FC    682004FE              BCR,2    %+2
     1681   01 004FD    2E000000 A            WAIT                       REPORT
     1682   01 004FE    321009D8              LW,1     =X'69'
     1683   01 004FF    320009B8              LW,0     =-1               SET CC4, RESET CC3
     1684   01 00500    48000979              EOR,0    =0                NO CHANGE
     1685   01 00501    480009B8              EOR,0    =-1               RESET CC4
     1686   01 00502    69100504              BCS,1    %+2               CC4 SET
     1687   01 00503    68200508              BCR,2    %+5               NO, CC3 SET?
     1688   01 00504    65200505              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1689   01 00505    6C000000 A            RD,0     0
     1690   01 00506    69100508              BCS,1    %+2
     1691   01 00507    2E000000 A            WAIT                       ERROR HALT
     1692   01 00508    6C000000 A            RD,0     0
     1693   01 00509    694004FB              BCS,4    BLK69             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   75
A    1695                            *
     1696                            * BLOCK 70
     1697                            *
     1698                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC4 WITH BIT CONFIGURATION
     1699                            *    OF 10 OR 01 AND 11 OR 00
     1700                            *
     1701   01 0050A    6C000000 A   BLK70    RD,0     0
     1702   01 0050B    6820050D              BCR,2    %+2
     1703   01 0050C    2E000000 A            WAIT                       REPORT
     1704   01 0050D    321009D9              LW,1     =X'70'
     1705   01 0050E    32000979              LW,0     =0                RESET CC3,CC4
     1706   01 0050F    320009DA              LW,0     =X'A5A5A5A5'      SET CC4
     1707   01 00510    480009DB              EOR,0    =X'5A5AA5A5'      =FFFF0000 - CC CHANGE
     1708   01 00511    480009DC              EOR,0    =X'FFFF0000'      =0 - RESET CC4
     1709   01 00512    69100514              BCS,1    %+2               CC4 SET?
     1710   01 00513    68200518              BCR,2    %+5               NO, CC3 SET?
     1711   01 00514    65200515              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1712   01 00515    6C000000 A            RD,0     0
     1713   01 00516    69100518              BCS,1    %+2
     1714   01 00517    2E000000 A            WAIT                       ERROR HALT
     1715   01 00518    6C000000 A            RD,0     0
     1716   01 00519    6940050A              BCS,4    BLK70             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   76
A    1718                            * BLOCK 71
     1719                            *
     1720                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC3 WITH BIT CONFIGURATION
     1721                            *    OF 11 OR 00 AND 10 OR 01
     1722                            *
     1723                            *
     1724   01 0051A    6C000000 A   BLK71    RD,0     0
     1725   01 0051B    6820051D              BCR,2    %+2
     1726   01 0051C    2E000000 A            WAIT                       REPORT
     1727   01 0051D    321009DD              LW,1     =X'71'
     1728   01 0051E    32000979              LW,0     =0                RESET CC3, CC4
     1729   01 0051F    320009DA              LW,0     =X'A5A5A5A5'      SET CC4
     1730   01 00520    480009DE              EOR,0    =X'A5A55A5A'      =0000FFFF - SET CC3/RESET CC4
     1731   01 00521    480009DF              EOR,0    =X'0000FFFF'      =0 - RESET CC3
     1732   01 00522    69100524              BCS,1    %+2               CC4 SET?
     1733   01 00523    68200528              BCR,2    %+5               NO, CC3 SET
     1734   01 00524    65200525              BIR,2    %+1               ERROR - CC3/CC4 SET
     1735   01 00525    6C000000 A            RD,0     0
     1736   01 00526    69100528              BCS,1    %+2
     1737   01 00527    2E000000 A            WAIT                       ERROR HALT
     1738   01 00528    6C000000 A            RD,0     0
     1739   01 00529    6940051A              BCS,4    BLK71             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   77
A    1741                            *
     1742                            * BLOCK 72
     1743                            *
     1744                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC4 WITH BIT CONFIGURATION
     1745                            *    OF 01 OR 10 AND 00 OR 11
     1746                            *
     1747   01 0052A    6C000000 A   BLK72    RD,0     0
     1748   01 0052B    6820052D              BCR,2    %+2
     1749   01 0052C    2E000000 A            WAIT                       REPORT
     1750   01 0052D    321009E0              LW,1     =X'72'
     1751   01 0052E    32000979              LW,0     =0                RESET CC3, CC4
     1752   01 0052F    320009E1              LW,0     =X'5A5A5A5A'      SET CC3
     1753   01 00530    480009DE              EOR,0    =X'A5A55A5A'      =FFFF0000, SET CC4
     1754   01 00531    480009DC              EOR,0    =X'FFFF0000'      =0, RESET CC4
     1755   01 00532    69100534              BCS,1    %+2               CC4 SET?
     1756   01 00533    68200538              BCR,2    %+5               NO, CC3 SET?
     1757   01 00534    65200535              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1758   01 00535    6C000000 A            RD,0     0
     1759   01 00536    69100538              BCS,1    %+2
     1760   01 00537    2E000000 A            WAIT                       ERROR HALT
     1761   01 00538    6C000000 A            RD,0     0
     1762   01 00539    6940052A              BCS,4    BLK72             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   78
A    1764                            *
     1765                            * BLOCK 73
     1766                            *
     1767                            * CHECK ABILITY OF LW-EOR SEQUENCE TO RESET CC3 WITH BIT CONFIGURATION
     1768                            *    OF 00 OR 11 AND 01 OR 10
     1769                            *
     1770   01 0053A    6C000000 A   BLK73    RD,0     0
     1771   01 0053B    6820053D              BCR,2    %+2
     1772   01 0053C    2E000000 A            WAIT                       REPORT
     1773   01 0053D    321009E2              LW,1     =X'73'
     1774   01 0053E    32000979              LW,0     =0                RESET CC3, CC4
     1775   01 0053F    320009E1              LW,0     =X'5A5A5A5A'      SET CC3
     1776   01 00540    480009DB              EOR,0    =X'5A5AA5A5'      =0000FFFF, NO CC CHANGE
     1777   01 00541    480009DF              EOR,0    =X'0000FFFF'      =0, RESET CC3
     1778   01 00542    69100544              BCS,1    %+2               CC4 SET?
     1779   01 00543    68200548              BCR,2    %+5               NO, CC3 SET?
     1780   01 00544    65200545              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1781   01 00545    6C000000 A            RD,0     0
     1782   01 00546    69100548              BCS,1    %+2
     1783   01 00547    2E000000 A            WAIT                       ERROR HALT
     1784   01 00548    6C000000 A            RD,0     0
     1785   01 00549    6940053A              BCS,4    BLK73             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   79
A    1787                            *
     1788                            * BLOCK 74
     1789                            *
     1790                            * CHECK AND FOR PROPER RESULTS IN ALL BIT POSITIONS WITH BIT
     1791                            *    CONFIGURATION OF 0'S AND 0'S
     1792                            *
     1793   01 0054A    6C000000 A   BLK74    RD,0     0
     1794   01 0054B    6820054D              BCR,2    %+2
     1795   01 0054C    2E000000 A            WAIT                       REPORT
     1796   01 0054D    321009E3              LW,1     =X'74'
     1797   01 0054E    32000979              LW,0     =0                REST CC3, CC4
     1798   01 0054F    4B000979              AND,0    =0                SHOULD = 0
     1799   01 00550    48000979              EOR,0    =0
     1800   01 00551    69100553              BCS,1    %+2               CC4 SET?
     1801   01 00552    68200557              BCR,2    %+5               NO, CC3 SET
     1802   01 00553    65200554              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1803   01 00554    6C000000 A            RD,0     0
     1804   01 00555    69100557              BCS,1    %+2
     1805   01 00556    2E000000 A            WAIT                       ERROR HALT
     1806   01 00557    6C000000 A            RD,0     0
     1807   01 00558    6940054A              BCS,4    BLK74             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   80
A    1809                            *
     1810                            * BLOCK 75
     1811                            *
     1812                            * CHECK AND FOR PROPER RESULTS IN ALL BIT POSITIONS WITH BIT
     1813                            *    CONFIGURATION OF 0'S AND 1'S
     1814                            *
     1815   01 00559    6C000000 A   BLK75    RD,0     0
     1816   01 0055A    6820055C              BCR,2    %+2
     1817   01 0055B    2E000000 A            WAIT                       REPORT
     1818   01 0055C    321009E4              LW,1     =X'75'
     1819   01 0055D    32000979              LW,0     =0                RESET CC3, CC4
     1820   01 0055E    4B0009B8              AND,0    =-1               SHOULD = 0
     1821   01 0055F    48000979              EOR,0    =0
     1822   01 00560    69100562              BCS,1    %+2               CC4 SET?
     1823   01 00561    68200566              BCR,2    %+5               NO, CC3 SET?
     1824   01 00562    65200563              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1825   01 00563    6C000000 A            RD,0     0
     1826   01 00564    69100566              BCS,1    %+2
     1827   01 00565    2E000000 A            WAIT                       ERROR HALT
     1828   01 00566    6C000000 A            RD,0     0
     1829   01 00567    69400559              BCS,4    BLK75             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   81
A    1831                            *
     1832                            * BLOCK 76
     1833                            *
     1834                            * CHECK AND FOR PROPER RESULTS IN ALL BIT POSITIONS WITH BIT
     1835                            *    CONFIGURATION OF 1'S AND 0'S
     1836                            *
     1837   01 00568    6C000000 A   BLK76    RD,0     0
     1838   01 00569    6820056B              BCR,2    %+2
     1839   01 0056A    2E000000 A            WAIT                       REPORT
     1840   01 0056B    321009E5              LW,1     =X'76'
     1841   01 0056C    320009B8              LW,0     =-1               SET CC4, RESET CC3
     1842   01 0056D    4B000979              AND,0    =0                SHOULD = 0 AND RESET CC4
     1843   01 0056E    48000979              EOR,0    =0
     1844   01 0056F    69100571              BCS,1    %+2               CC4 SET?
     1845   01 00570    68200575              BCR,2    %+5               NO, CC3 SET?
     1846   01 00571    65200572              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1847   01 00572    6C000000 A            RD,0     0
     1848   01 00573    69100575              BCS,1    %+2
     1849   01 00574    2E000000 A            WAIT                       ERROR HALT
     1850   01 00575    6C000000 A            RD,0     0
     1851   01 00576    69400568              BCS,4    BLK76             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   82
A    1853                            *
     1854                            * BLOCK 77
     1855                            *
     1856                            * CHECK AND FOR PROPER RESULTS IN ALL BIT POSITIONS WITH BIT
     1857                            *    CONFIGURATION OF 1'S AND 1'S
     1858                            *
     1859   01 00577    6C000000 A   BLK77    RD,0     0
     1860   01 00578    6820057A              BCR,2    %+2
     1861   01 00579    2E000000 A            WAIT                       REPORT
     1862   01 0057A    321009E6              LW,1     =X'77'
     1863   01 0057B    320009B8              LW,0     =-1
     1864   01 0057C    4B0009B8              AND,0    =-1               SHOULD = -1
     1865   01 0057D    480009B8              EOR,0    =-1               SHOULD = 0 AND RESET CC3, CC4
     1866   01 0057E    69100580              BCS,1    %+2               CC4 SET?
     1867   01 0057F    68200584              BCR,2    %+5               NO, CC3 SET?
     1868   01 00580    65200581              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1869   01 00581    6C000000 A            RD,0     0
     1870   01 00582    69100584              BCS,1    %+2
     1871   01 00583    2E000000 A            WAIT                       ERROR HALT
     1872   01 00584    6C000000 A            RD,0     0
     1873   01 00585    69400577              BCS,4    BLK77             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   83
A    1875                            *
     1876                            * BLOCK 78
     1877                            *
     1878                            * CHECK ABILITY OF AND TO NOT SET CC3 OR CC4 WHEN RESULT = 0
     1879                            *
     1880   01 00586    6C000000 A   BLK78    RD,0     0
     1881   01 00587    68200589              BCR,2    %+2
     1882   01 00588    2E000000 A            WAIT                       REPORT
     1883   01 00589    321009E7              LW,1     =X'78'
     1884   01 0058A    32000979              LW,0     =0                RESET CC3, CC4
     1885   01 0058B    4B0009B8              AND,0    =-1               SHOULD = 0
     1886   01 0058C    6910058E              BCS,1    %+2               CC4 SET?
     1887   01 0058D    68200592              BCR,2    %+5               NO, CC3 SET?
     1888   01 0058E    6520058F              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1889   01 0058F    6C000000 A            RD,0     0
     1890   01 00590    69100592              BCS,1    %+2
     1891   01 00591    2E000000 A            WAIT                       ERROR HALT
     1892   01 00592    6C000000 A            RD,0     0
     1893   01 00593    69400586              BCS,4    BLK78             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   84
A    1895                            *
     1896                            * BLOCK 79
     1897                            *
     1898                            * CHECK ABILITY OF AND TO SET CC3 WHEN RESULT IS POSITIVE
     1899                            *
     1900   01 00594    6C000000 A   BLK79    RD,0     0
     1901   01 00595    68200597              BCR,2    %+2
     1902   01 00596    2E000000 A            WAIT                       REPORT
     1903   01 00597    321009E8              LW,1     =X'79'
     1904   01 00598    3200097A              LW,0     =1                SET CC3
     1905   01 00599    4B0009B8              AND,0    =-1               SHOULD = 00000001, NO CC CHANGE
     1906   01 0059A    6910059C              BCS,1    %+2               CC4 SET?
     1907   01 0059B    692005A0              BCS,2    %+5               NO, CC3 SET?
     1908   01 0059C    6520059D              BIR,2    %+1               ERROR - CC3 RESET/CC4 SET
     1909   01 0059D    6C000000 A            RD,0     0
     1910   01 0059E    691005A0              BCS,1    %+2
     1911   01 0059F    2E000000 A            WAIT                       ERROR HALT
     1912   01 005A0    6C000000 A            RD,0     0
     1913   01 005A1    69400594              BCS,4    BLK79             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   85
A    1915                            *
     1916                            * BLOCK 80
     1917                            *
     1918                            * CHECK ABILITY OF AND TO SET CC4 WHEN RESULT IS NEGATIVE
     1919                            *
     1920   01 005A2    6C000000 A   BLK80    RD,0     0
     1921   01 005A3    682005A5              BCR,2    %+2
     1922   01 005A4    2E000000 A            WAIT                       REPORT
     1923   01 005A5    32100986              LW,1     =X'80'
     1924   01 005A6    320009B4              LW,0     =X'80000000'
     1925   01 005A7    4B0009B8              AND,0    =-1               SHOULD = 80000000, SET CC4
     1926   01 005A8    681005AA              BCR,1    %+2               CC4 SET?
     1927   01 005A9    682005AE              BCR,2    %+5               YES, CC3 SET?
     1928   01 005AA    652005AB              BIR,2    %+1               ERROR - CC3 SET/CC4 RESET
     1929   01 005AB    6C000000 A            RD,0     0
     1930   01 005AC    691005AE              BCS,1    %+2
     1931   01 005AD    2E000000 A            WAIT                       ERROR HALT
     1932   01 005AE    6C000000 A            RD,0     0
     1933   01 005AF    694005A2              BCS,4    BLK80             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   86
A    1935                            *
     1936                            * BLOCK 81
     1937                            *
     1938                            * CHECK ABILITY OF STW TO STORE ZEROS
     1939                            *
     1940   01 005B0    6C000000 A   BLK81    RD,0     0
     1941   01 005B1    682005B3              BCR,2    %+2
     1942   01 005B2    2E000000 A            WAIT                       REPORT
     1943   01 005B3    321009E9              LW,1     =X'81'
     1944   01 005B4    32000979              LW,0     =0
     1945   01 005B5    35000978              STW,0    T1
     1946   01 005B6    32000978              LW,0     T1                SHOULD RESET CC3, CC4
     1947   01 005B7    691005B9              BCS,1    %+2               CC4 SET?
     1948   01 005B8    682005BD              BCR,2    %+5               NO, CC3 SET?
     1949   01 005B9    652005BA              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1950   01 005BA    6C000000 A            RD,0     0
     1951   01 005BB    691005BD              BCS,1    %+2
     1952   01 005BC    2E000000 A            WAIT                       ERROR HALT
     1953   01 005BD    6C000000 A            RD,0     0
     1954   01 005BE    694005B0              BCS,4    BLK81             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   87
A    1956                            *
     1957                            * BLOCK 82
     1958                            *
     1959                            * CHECK ABILITY OF STW TO STORE ONES ON ZEROS
     1960                            *
     1961   01 005BF    6C000000 A   BLK82    RD,0     0
     1962   01 005C0    682005C2              BCR,2    %+2
     1963   01 005C1    2E000000 A            WAIT                       REPORT
     1964   01 005C2    321009E9              LW,1     =X'81'
     1965   01 005C3    32000979              LW,0     =0
     1966   01 005C4    35000978              STW,0    T1                CLEAR T1
     1967   01 005C5    320009B8              LW,0     =-1
     1968   01 005C6    35000978              STW,0    T1                FILL T1 WITH ONES
     1969   01 005C7    32000979              LW,0     =0
     1970   01 005C8    32000978              LW,0     T1
     1971   01 005C9    480009B8              EOR,0    =-1               SHOULD = 0, RESET CC3, CC4
     1972   01 005CA    691005CC              BCS,1    %+2               CC4 SET?
     1973   01 005CB    682005D0              BCR,2    %+5               NO, CC3 SET?
     1974   01 005CC    652005CD              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     1975   01 005CD    6C000000 A            RD,0     0
     1976   01 005CE    691005D0              BCS,1    %+2
     1977   01 005CF    2E000000 A            WAIT                       ERROR HALT
     1978   01 005D0    6C000000 A            RD,0     0
     1979   01 005D1    694005BF              BCS,4    BLK82             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   88
A    1981                            *
     1982                            * BLOCK 83
     1983                            *
     1984                            * CHECK ABILITY OF STW TO STORE ONES ON ONES
     1985                            *
     1986   01 005D2    6C000000 A   BLK83    RD,0     0
     1987   01 005D3    682005D5              BCR,2    %+2
     1988   01 005D4    2E000000 A            WAIT                       REPORT
     1989   01 005D5    321009EA              LW,1     =X'83'
     1990   01 005D6    32000979              LW,0     =0
     1991   01 005D7    320009B8              LW,0     =-1
     1992   01 005D8    35000978              STW,0    T1
     1993   01 005D9    320009B8              LW,0     =-1
     1994   01 005DA    35000978              STW,0    T1
     1995   01 005DB    32000979              LW,0     =0
     1996   01 005DC    32000978              LW,0     T1
     1997   01 005DD    480009B8              EOR,0    =-1               SHOULD = 0, RESET CC3, CC4
     1998   01 005DE    691005E0              BCS,1    %+2               CC4 SET?
     1999   01 005DF    682005E4              BCR,2    %+5               NO, CC3 SET?
     2000   01 005E0    652005E1              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     2001   01 005E1    6C000000 A            RD,0     0
     2002   01 005E2    691005E4              BCS,1    %+2
     2003   01 005E3    2E000000 A            WAIT                       ERROR HALT
     2004   01 005E4    6C000000 A            RD,0     0
     2005   01 005E5    694005D2              BCS,4    BLK83             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   89
A    2007                            *
     2008                            * BLOCK 84
     2009                            *
     2010                            * CHECK ABILITY OF STW TO STORE ZEROS ON ONES
     2011                            *
     2012   01 005E6    6C000000 A   BLK84    RD,0     0
     2013   01 005E7    682005E9              BCR,2    %+2
     2014   01 005E8    2E000000 A            WAIT                       REPORT
     2015   01 005E9    321009EB              LW,1     =X'84'
     2016   01 005EA    32000979              LW,0     =0
     2017   01 005EB    320009B8              LW,0     =-1
     2018   01 005EC    35000978              STW,0    T1
     2019   01 005ED    32000979              LW,0     =0
     2020   01 005EE    35000978              STW,0    T1
     2021   01 005EF    320009B8              LW,0     =-1
     2022   01 005F0    32000978              LW,0     T1                SHOULD = 0, CC3, CC4 RESET
     2023   01 005F1    691005F3              BCS,1    %+2               CC4 SET?
     2024   01 005F2    682005F7              BCR,2    %+5               NO, CC3 SET?
     2025   01 005F3    652005F4              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     2026   01 005F4    6C000000 A            RD,0     0
     2027   01 005F5    691005F7              BCS,1    %+2
     2028   01 005F6    2E000000 A            WAIT                       ERROR HALT
     2029   01 005F7    6C000000 A            RD,0     0
     2030   01 005F8    694005E6              BCS,4    BLK84
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   90
A    2032                            *
     2033                            * BLOCK 85
     2034                            *
     2035                            * CHECK ABILITY OF STW TO STORE ZEROS ON ZEROS
     2036                            *
     2037   01 005F9    6C000000 A   BLK85    RD,0     0
     2038   01 005FA    682005FC              BCR,2    %+2
     2039   01 005FB    2E000000 A            WAIT                       REPORT
     2040   01 005FC    321009EC              LW,1     =X'85'
     2041   01 005FD    32000979              LW,0     =0
     2042   01 005FE    35000978              STW,0    T1
     2043   01 005FF    32000979              LW,0     =0
     2044   01 00600    35000978              STW,0    T1
     2045   01 00601    320009B8              LW,0     =-1               FILL REG 0 WITH ONES, SET CC4
     2046   01 00602    32000978              LW,0     T1                SHOULD = 0, RESET CC3, CC4
     2047   01 00603    69100605              BCS,1    %+2               CC4 SET?
     2048   01 00604    68200609              BCR,2    %+5               NO, CC3 SET?
     2049   01 00605    65200606              BIR,2    %+1               YES, ERROR - CC3/CC4 SET
     2050   01 00606    6C000000 A            RD,0     0
     2051   01 00607    69100609              BCS,1    %+2
     2052   01 00608    2E000000 A            WAIT                       ERROR HALT
     2053   01 00609    6C000000 A            RD,0     0
     2054   01 0060A    694005F9              BCS,4    BLK85             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   91
A    2056                            *
     2057                            * BLOCK 86
     2058                            *
     2059                            * CHECK BCS,1 WITH CC4 SET, CC3 RESET
     2060                            *
     2061   01 0060B    6C000000 A   BLK86    RD,0     0
     2062   01 0060C    6820060E              BCR,2    %+2
     2063   01 0060D    2E000000 A            WAIT                       REPORT
     2064   01 0060E    321009ED              LW,1     =X'86'
     2065   01 0060F    320009B4              LW,0     =X'80000000'      SET CC4
     2066   01 00610    69100615              BCS,1    %+5               SHOULD BRANCH
     2067   01 00611    65200612              BIR,2    %+1               ERROR
     2068   01 00612    6C000000 A            RD,0     0
     2069   01 00613    69100615              BCS,1    %+2
     2070   01 00614    2E000000 A            WAIT                       ERROR HALT
     2071   01 00615    6C000000 A            RD,0     0
     2072   01 00616    6940060B              BCS,4    BLK86             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   92
A    2074                            *
     2075                            * BLOCK 87
     2076                            *
     2077                            * CHECK BCR,1 WITH CC3, CC4 RESET
     2078                            *
     2079   01 00617    6C000000 A   BLK87    RD,0     0
     2080   01 00618    6820061A              BCR,2    %+2
     2081   01 00619    2E000000 A            WAIT                       REPORT
     2082   01 0061A    321009EE              LW,1     =X'87'
     2083   01 0061B    32000979              LW,0     =0                RESET CC3, CC4
     2084   01 0061C    68100621              BCR,1    %+5               SHOULD BRANCH
     2085   01 0061D    6520061E              BIR,2    %+1               ERROR
     2086   01 0061E    6C000000 A            RD,0     0
     2087   01 0061F    69100621              BCS,1    %+2
     2088   01 00620    2E000000 A            WAIT                       ERROR HALT
     2089   01 00621    6C000000 A            RD,0     0
     2090   01 00622    69400617              BCS,4    BLK87             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   93
A    2092                            *
     2093                            ** BLOCK 88
     2094                            *
     2095                            * CHECK BCS,2 WITH CC3, CC4 RESET
     2096                            *
     2097   01 00623    6C000000 A   BLK88    RD,0     0
     2098   01 00624    68200626              BCR,2    %+2
     2099   01 00625    2E000000 A            WAIT                       REPORT
     2100   01 00626    321009EF              LW,1     =X'88'
     2101   01 00627    32000979              LW,0     =0                RESET CC3, CC4
     2102   01 00628    6920062A              BCS,2    %+2               SHOULD NOT BRANCH
     2103   01 00629    6800062E              B        %+5               SHOULD BRANCH
     2104   01 0062A    6520062B              BIR,2    %+1               ERROR
     2105   01 0062B    6C000000 A            RD,0     0
     2106   01 0062C    6910062E              BCS,1    %+2
     2107   01 0062D    2E000000 A            WAIT                       ERROR HALT
     2108   01 0062E    6C000000 A            RD,0     0
     2109   01 0062F    69400623              BCS,4    BLK88             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   94
A    2111                            *
     2112                            * BLOCK 89
     2113                            *
     2114                            * CHECK BCR,2 WITH CC3 SET AND CC4 RESET
     2115                            *
     2116   01 00630    6C000000 A   BLK89    RD,0     0
     2117   01 00631    68200633              BCR,2    %+2
     2118   01 00632    2E000000 A            WAIT                       REPORT
     2119   01 00633    321009F0              LW,1     =X'89'
     2120   01 00634    32000979              LW,0     =0
     2121   01 00635    3200097A              LW,0     =1                SET CC3, RESET CC4
     2122   01 00636    68200638              BCR,2    %+2               SHOULD NOT BRANCH
     2123   01 00637    6800063C              B        %+5               SHOULD BRANCH
     2124   01 00638    65200639              BIR,2    %+1               ERROR
     2125   01 00639    6C000000 A            RD,0     0
     2126   01 0063A    6910063C              BCS,1    %+2
     2127   01 0063B    2E000000 A            WAIT                       ERROR HALT
     2128   01 0063C    6C000000 A            RD,0     0
     2129   01 0063D    69400630              BCS,4    BLK89             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   95
A    2131                            *
     2132                            * BLOCK 90
     2133                            *
     2134                            * CHECK BCS,0 WITH CC3 RESET AND CC4 SET
     2135                            *
     2136   01 0063E    6C000000 A   BLK90    RD,0     0
     2137   01 0063F    68200641              BCR,2    %+2
     2138   01 00640    2E000000 A            WAIT                       REPORT
     2139   01 00641    321009F1              LW,1     =X'90'
     2140   01 00642    32000979              LW,0     =0
     2141   01 00643    320009B8              LW,0     =-1               SET CC4
     2142   01 00644    69000646              BCS,0    %+2               SHOULD NOT BRANCH
     2143   01 00645    6800064A              B        %+5               SHOULD BRANCH
     2144   01 00646    65200647              BIR,2    %+1               ERROR
     2145   01 00647    6C000000 A            RD,0     0
     2146   01 00648    6910064A              BCS,1    %+2
     2147   01 00649    2E000000 A            WAIT                       ERROR HALT
     2148   01 0064A    6C000000 A            RD,0     0
     2149   01 0064B    6940063E              BCS,4    BLK90             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   96
A    2151                            *
     2152                            * BLOCK 91
     2153                            *
     2154                            * CHECK BCS,0 WITH CC3 SET AND CC4 RESET
     2155                            *
     2156   01 0064C    6C000000 A   BLK91    RD,0     0
     2157   01 0064D    6820064F              BCR,2    %+2
     2158   01 0064E    2E000000 A            WAIT                       REPORT
     2159   01 0064F    321009F2              LW,1     =X'91'
     2160   01 00650    3200097A              LW,0     =1                SETCC3
     2161   01 00651    69000653              BCS,0    %+2               SHOULD NOT BRANCH
     2162   01 00652    68000657              B        %+5               SHOULD BRANCH
     2163   01 00653    65200654              BIR,2    %+1               ERROR
     2164   01 00654    6C000000 A            RD,0     0
     2165   01 00655    69100657              BCS,1    %+2
     2166   01 00656    2E000000 A            WAIT                       ERROR HALT
     2167   01 00657    6C000000 A            RD,0     0
     2168   01 00658    6940064C              BCS,4    BLK91             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   97
A    2170                            *
     2171                            * BLOCK 92
     2172                            *
     2173                            * CHECK BIR FOR ADDER INPUTS OF A(0-31)=0, CS(0-30)=0, AND K(0-31)=0
     2174                            *
     2175   01 00659    6C000000 A   BLK92    RD,0     0
     2176   01 0065A    6820065C              BCR,2    %+2
     2177   01 0065B    2E000000 A            WAIT                       REPORT
     2178   01 0065C    321009F3              LW,1     =X'92'
     2179   01 0065D    32000979              LW,0     =0                A = 0
     2180   01 0065E    65000663              BIR,0    %+5               REG 0 = 1, NO BRANCH
     2181   01 0065F    4800097A              EOR,0    =1                =0, RESER CC3, CC4
     2182   01 00660    69100662              BCS,1    %+2
     2183   01 00661    68200666              BCR,2    %+5
     2184   01 00662    65200663              BIR,2    %+1               ERROR - CC3/CC4 SET
     2185   01 00663    6C000000 A            RD,0     0
     2186   01 00664    69100666              BCS,1    %+2
     2187   01 00665    2E000000 A            WAIT                       ERROR HALT
     2188   01 00666    6C000000 A            RD,0     0
     2189   01 00667    69400659              BCS,4    BLK92             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   98
A    2191                            *
     2192                            * BLOCK 93
     2193                            *
     2194                            * CHECK BIR FOR ADDER INPUTS OF A(0-30)=1, CS(0-30)=0, AND K(0-31)=0
     2195                            *
     2196   01 00668    6C000000 A   BLK93    RD,0     0
     2197   01 00669    6820066B              BCR,2    %+2
     2198   01 0066A    2E000000 A            WAIT                       REPORT
     2199   01 0066B    321009F4              LW,1     =X'93'
     2200   01 0066C    320009F5              LW,0     =X'FFFFFFFE'      SET A(0-30)
     2201   01 0066D    6500066F              BIR,0    %+2               =-1, SHOULD BRANCH
     2202   01 0066E    68000673              B        %+5               ERROR - NO BRANCH
     2203   01 0066F    480009B8              EOR,0    =-1               RESULT = 0, RESET CC3, CC4
     2204   01 00670    69100672              BCS,1    %+2
     2205   01 00671    68200676              BCR,2    %+5
     2206   01 00672    65200673              BIR,2    %+1               ERROR - CC3/CC4 SET
     2207   01 00673    6C000000 A            RD,0     0
     2208   01 00674    69100676              BCS,1    %+2
     2209   01 00675    2E000000 A            WAIT                       ERROR HALT
     2210   01 00676    6C000000 A            RD,0     0
     2211   01 00677    69400668              BCS,4    BLK93             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE   99
A    2213                            *
     2214                            * BLOCK 94
     2215                            *
     2216                            * CHECK BIR FOR ADDER INPUTS OF A(0-31)=1, CS(0-30)=0, AND K(0-30)=1
     2217                            *
     2218   01 00678    6C000000 A   BLK94    RD,0     0
     2219   01 00679    6820067B              BCR,2    %+2
     2220   01 0067A    2E000000 A            WAIT                       REPORT
     2221   01 0067B    321009F6              LW,1     =X'94'
     2222   01 0067C    320009B8              LW,0     =-1               SET A(0-31)
     2223   01 0067D    65000682              BIR,0    %+5               INCREMENT TO ZERO - NO BRANCH
     2224   01 0067E    48000979              EOR,0    =0                CC3,CC4 SHOULD RESET
     2225   01 0067F    69100681              BCS,1    %+2               CC4 SCT?
     2226   01 00680    68200685              BCR,2    %+5               NO, CC3 SET?
     2227   01 00681    65200682              BIR,2    %+1               YES - ERROR
     2228   01 00682    6C000000 A            RD,0     0
     2229   01 00683    69100685              BCS,1    %+2
     2230   01 00684    2E000000 A            WAIT                       ERROR HALT
     2231   01 00685    6C000000 A            RD,0     0
     2232   01 00686    69400678              BCS,4    BLK94             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  100
A    2234                            *
     2235                            * BLOCK 95
     2236                            *
     2237                            * CHECK BIR FOR ADDER INPUTS A(0-30)=0, CS(0-30)=0, AND K30=1
     2238                            *
     2239                            *
     2240   01 00687    6C000000 A   BLK95    RD,0     0
     2241   01 00688    6820068A              BCR,2    %+2
     2242   01 00689    2E000000 A            WAIT                       REPORT
     2243   01 0068A    321009F7              LW,1     =X'95'
     2244   01 0068B    3200097A              LW,0     =1                SCT A31
     2245   01 0068C    65000691              BIR,0    %+5               REG 0 = 2
     2246   01 0068D    4800097B              EOR,0    =2                SUM=2?
     2247   01 0068E    69100690              BCS,1    %+2               NO
     2248   01 0068F    68200694              BCR,2    %+5               YES
     2249   01 00690    65200691              BIR,2    %+1
     2250   01 00691    6C000000 A            RD,0     0
     2251   01 00692    69100694              BCS,1    %+2
     2252   01 00693    2E000000 A            WAIT                       ERROR HALT
     2253   01 00694    6C000000 A            RD,0     0
     2254   01 00695    69400687              BCS,4    BLK95             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  101
A    2256                            *
     2257                            * BLOCK 96
     2258                            *
     2259                            * CHECK BIR FOR ADDER INPUTS OF A29=0, CS29=0, AND K29=1
     2260                            *
     2261   01 00696    6C000000 A   BLK96    RD,0     0
     2262   01 00697    68200699              BCR,2    %+2
     2263   01 00698    2E000000 A            WAIT                       REPORT
     2264   01 00699    321009F8              LW,1     =X'96'
     2265   01 0069A    3200097C              LW,0     =3                A29=0
     2266   01 0069B    650006A0              BIR,0    %+5               REG 0 = 4
     2267   01 0069C    4800097D              EOR,0    =4                SUM=4?
     2268   01 0069D    6910069F              BCS,1    %+2               NO
     2269   01 0069E    682006A3              BCR,2    %+5               YES
     2270   01 0069F    652006A0              BIR,2    %+1
     2271   01 006A0    6C000000 A            RD,0     0
     2272   01 006A1    691006A3              BCS,1    %+2
     2273   01 006A2    2E000000 A            WAIT                       ERROR HALT
     2274   01 006A3    6C000000 A            RD,0     0
     2275   01 006A4    69400696              BCS,4    BLK96             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  102
A    2277                            *
     2278                            * BLOCK 97
     2279                            *
     2280                            * CHECK BIR FOR ADDER INPUTS OF A28=0, CS28=0, AND K28=1
     2281                            *
     2282   01 006A5    6C000000 A   BLK97    RD,0     0
     2283   01 006A6    682006A8              BCR,2    %+2
     2284   01 006A7    2E000000 A            WAIT                       REPORT
     2285   01 006A8    321009F9              LW,1     =X'97'
     2286   01 006A9    32000982              LW,0     =7                A28=0
     2287   01 006AA    650006AF              BIR,0    %+5               REG 0 = 8
     2288   01 006AB    4800097F              EOR,0    =8                SUM=8?
     2289   01 006AC    691006AE              BCS,1    %+2               (3
     2290   01 006AD    682006B2              BCR,2    %+5               YES
     2291   01 006AE    652006AF              BIR,2    %+1
     2292   01 006AF    6C000000 A            RD,0     0
     2293   01 006B0    691006B2              BCS,1    %+2
     2294   01 006B1    2E000000 A            WAIT                       ERROR HALT
     2295   01 006B2    6C000000 A            RD,0     0
     2296   01 006B3    694006A5              BCS,4    BLK97             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  103
A    2298                            *
     2299                            * BLOCK 98
     2300                            *
     2301                            * CHECK BIR FOR ADDER INPUTS OF A27=0, CS27=0, AND K27=1
     2302                            *
     2303   01 006B4    6C000000 A   BLK98    RD,0     0
     2304   01 006B5    682006B7              BCR,2    %+2
     2305   01 006B6    2E000000 A            WAIT                       REPORT
     2306   01 006B7    321009FA              LW,1     =X'98'
     2307   01 006B8    320009FB              LW,0     =X'F'             A27=0
     2308   01 006B9    650006BE              BIR,0    %+5               REG 0 = 10
     2309   01 006BA    48000981              EOR,0    =X'10'            SUM=10?
     2310   01 006BB    691006BD              BCS,1    %+2               NO
     2311   01 006BC    682006C1              BCR,2    %+5               YES
     2312   01 006BD    652006BE              BIR,2    %+1
     2313   01 006BE    6C000000 A            RD,0     0
     2314   01 006BF    691006C1              BCS,1    %+2
     2315   01 006C0    2E000000 A            WAIT                       ERROR HALT
     2316   01 006C1    6C000000 A            RD,0     0
     2317   01 006C2    694006B4              BCS,4    BLK98             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  104
A    2319                            *
     2320                            * BLOCK 99
     2321                            *
     2322                            * CHECK BIR FOR ADDER INPUTS OF A26=0, CS26=0, K26=1
     2323                            *
     2324   01 006C3    6C000000 A   BLK99    RD,0     0
     2325   01 006C4    682006C6              BCR,2    %+2
     2326   01 006C5    2E000000 A            WAIT                       REPORT
     2327   01 006C6    321009FC              LW,1     =X'99'
     2328   01 006C7    320009FD              LW,0     =X'1F'            A26=0
     2329   01 006C8    650006CD              BIR,0    %+5               REG 0 = 20
     2330   01 006C9    48000983              EOR,0    =X'20'            SUM=20?
     2331   01 006CA    691006CC              BCS,1    %+2               NO
     2332   01 006CB    682006D0              BCR,2    %+5               YES
     2333   01 006CC    652006CD              BIR,2    %+1
     2334   01 006CD    6C000000 A            RD,0     0
     2335   01 006CE    691006D0              BCS,1    %+2
     2336   01 006CF    2E000000 A            WAIT                       ERROR HALT
     2337   01 006D0    6C000000 A            RD,0     0
     2338   01 006D1    694006C3              BCS,4    BLK99             LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  105
A    2340                            *
     2341                            * BLOCK 100
     2342                            *
     2343                            * CHECK BIR FOR ADDER INPUTS OF A25=0, CS25=0, AND K25=1
     2344                            *
     2345   01 006D2    6C000000 A   BLK100   RD,0     0
     2346   01 006D3    682006D5              BCR,2    %+2
     2347   01 006D4    2E000000 A            WAIT                       REPORT
     2348   01 006D5    32100987              LW,1     =X'100'
     2349   01 006D6    320009FE              LW,0     =X'3F'            A25=0
     2350   01 006D7    650006DC              BIR,0    %+5               REG 0 = 40
     2351   01 006D8    48000984              EOR,0    =X'40'            SUM=40?
     2352   01 006D9    691006DB              BCS,1    %+2               NO
     2353   01 006DA    682006DF              BCR,2    %+5               YES
     2354   01 006DB    652006DC              BIR,2    %+1
     2355   01 006DC    6C000000 A            RD,0     0
     2356   01 006DD    691006DF              BCS,1    %+2
     2357   01 006DE    2E000000 A            WAIT                       ERROR HALT
     2358   01 006DF    6C000000 A            RD,0     0
     2359   01 006E0    694006D2              BCS,4    BLK100            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  106
A    2361                            *
     2362                            * BLOCK 101
     2363                            *
     2364                            * CHECK BIR FOR ADDER INPUTS OF A24=0, CS24=0, AND K24=1
     2365                            *
     2366   01 006E1    6C000000 A   BLK101   RD,0     0
     2367   01 006E2    682006E4              BCR,2    %+2
     2368   01 006E3    2E000000 A            WAIT                       REPORT
     2369   01 006E4    321009FF              LW,1     =X'101'
     2370   01 006E5    32000A00              LW,0     =X'7F'            A24=0
     2371   01 006E6    650006EB              BIR,0    %+5               REG 0 = 80
     2372   01 006E7    48000986              EOR,0    =X'80'            SUM=80?
     2373   01 006E8    691006EA              BCS,1    %+2               NO
     2374   01 006E9    682006EE              BCR,2    %+5               YES
     2375   01 006EA    652006EB              BIR,2    %+1
     2376   01 006EB    6C000000 A            RD,0     0
     2377   01 006EC    691006EE              BCS,1    %+2
     2378   01 006ED    2E000000 A            WAIT                       ERROR HALT
     2379   01 006EE    6C000000 A            RD,0     0
     2380   01 006EF    694006E1              BCS,4    BLK101            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  107
A    2382                            *
     2383                            * BLOCK 102
     2384                            *
     2385                            * CHECK BIR FOR ADDER INPUTS OF A23=0, CS23=0, AND K23=1
     2386                            *
     2387   01 006F0    6C000000 A   BLK102   RD,0     0
     2388   01 006F1    682006F3              BCR,2    %+2
     2389   01 006F2    2E000000 A            WAIT                       REPORT
     2390   01 006F3    32100A01              LW,1     =X'102'
     2391   01 006F4    32000A02              LW,0     =X'FF'            A23=0
     2392   01 006F5    650006FA              BIR,0    %+5               REG 0 = 100
     2393   01 006F6    48000987              EOR,0    =X'100'           SUM=100?
     2394   01 006F7    691006F9              BCS,1    %+2               NO
     2395   01 006F8    682006FD              BCR,2    %+5               YES
     2396   01 006F9    652006FA              BIR,2    %+1
     2397   01 006FA    6C000000 A            RD,0     0
     2398   01 006FB    691006FD              BCS,1    %+2
     2399   01 006FC    2E000000 A            WAIT                       ERROR HALT
     2400   01 006FD    6C000000 A            RD,0     0
     2401   01 006FE    694006F0              BCS,4    BLK102            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  108
A    2403                            *
     2404                            * BLOCK 103
     2405                            *
     2406                            * CHECK BIR FOR ADDER INPUTS OF A22=0, CS22=0, K22=1
     2407                            *
     2408   01 006FF    6C000000 A   BLK103   RD,0     0
     2409   01 00700    68200702              BCR,2    %+2
     2410   01 00701    2E000000 A            WAIT                       REPORT
     2411   01 00702    32100A03              LW,1     =X'103'
     2412   01 00703    32000A04              LW,0     =X'1FF'           A22=0
     2413   01 00704    65000709              BIR,0    %+5               REG 0 = 200
     2414   01 00705    48000989              EOR,0    =X'200'           SUM=200?
     2415   01 00706    69100708              BCS,1    %+2               NO
     2416   01 00707    6820070C              BCR,2    %+5               YES
     2417   01 00708    65200709              BIR,2    %+1
     2418   01 00709    6C000000 A            RD,0     0
     2419   01 0070A    6910070C              BCS,1    %+2
     2420   01 0070B    2E000000 A            WAIT                       ERROR HALT
     2421   01 0070C    6C000000 A            RD,0     0
     2422   01 0070D    694006FF              BCS,4    BLK103            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  109
A    2424                            *
     2425                            * BLOCK 104
     2426                            *
     2427                            * CHECK BIR FOR ADDER INPUTS OF A21=0, CS21=0, K21=1
     2428                            *
     2429   01 0070E    6C000000 A   BLK104   RD,0     0
     2430   01 0070F    68200711              BCR,2    %+2
     2431   01 00710    2E000000 A            WAIT                       REPORT
     2432   01 00711    32100A05              LW,1     =X'104'
     2433   01 00712    32000A06              LW,0     =X'3FF'           A21=0
     2434   01 00713    65000718              BIR,0    %+5               REG 0 = 400
     2435   01 00714    4800098B              EOR,0    =X'400'           SUM=400?
     2436   01 00715    69100717              BCS,1    %+2               NO
     2437   01 00716    6820071B              BCR,2    %+5               YES
     2438   01 00717    65200718              BIR,2    %+1
     2439   01 00718    6C000000 A            RD,0     0
     2440   01 00719    6910071B              BCS,1    %+2
     2441   01 0071A    2E000000 A            WAIT                       ERROR HALT
     2442   01 0071B    6C000000 A            RD,0     0
     2443   01 0071C    6940070E              BCS,4    BLK104            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  110
A    2445                            *
     2446                            * BLOCK 105
     2447                            *
     2448                            * CHECK BIR FOR ADDER INPUTS OF A20=0, CS20=0, K20=1
     2449                            *
     2450   01 0071D    6C000000 A   BLK105   RD,0     0
     2451   01 0071E    68200720              BCR,2    %+2
     2452   01 0071F    2E000000 A            WAIT                       REPORT
     2453   01 00720    32100A07              LW,1     =X'105'
     2454   01 00721    32000A08              LW,0     =X'7FF'           A20=0
     2455   01 00722    65000727              BIR,0    %+5               REG 0 = 800
     2456   01 00723    4800098D              EOR,0    =X'800'           SUM=800?
     2457   01 00724    69100726              BCS,1    %+2               NO
     2458   01 00725    6820072A              BCR,2    %+5               YES
     2459   01 00726    65200727              BIR,2    %+1
     2460   01 00727    6C000000 A            RD,0     0
     2461   01 00728    6910072A              BCS,1    %+2
     2462   01 00729    2E000000 A            WAIT                       ERROR HALT
     2463   01 0072A    6C000000 A            RD,0     0
     2464   01 0072B    6940071D              BCS,4    BLK105            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  111
A    2466                            *
     2467                            * BLOCK 106
     2468                            *
     2469                            * CHECK BIR FOR ADDER INPUTS OF A19=0, CS19=0, K19=1
     2470                            *
     2471   01 0072C    6C000000 A   BLK106   RD,0     0
     2472   01 0072D    6820072F              BCR,2    %+2
     2473   01 0072E    2E000000 A            WAIT                       REPORT
     2474   01 0072F    32100A09              LW,1     =X'106'
     2475   01 00730    32000A0A              LW,0     =X'FFF'           A19=0
     2476   01 00731    65000736              BIR,0    %+5               REG 0 = 1000
     2477   01 00732    4800098F              EOR,0    =X'1000'          SUM=1000?
     2478   01 00733    69100735              BCS,1    %+2               NO
     2479   01 00734    68200739              BCR,2    %+5               YES
     2480   01 00735    65200736              BIR,2    %+1
     2481   01 00736    6C000000 A            RD,0     0
     2482   01 00737    69100739              BCS,1    %+2
     2483   01 00738    2E000000 A            WAIT                       ERROR HALT
     2484   01 00739    6C000000 A            RD,0     0
     2485   01 0073A    6940072C              BCS,4    BLK106            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  112
A    2487                            *
     2488                            * BLOCK 107
     2489                            *
     2490                            * CHECK BIR FOR ADDER INPUTS OF A18=0, CS18=0, K18=1
     2491                            *
     2492   01 0073B    6C000000 A   BLK107   RD,0     0
     2493   01 0073C    6820073E              BCR,2    %+2
     2494   01 0073D    2E000000 A            WAIT                       REPORT
     2495   01 0073E    32100A0B              LW,1     =X'107'
     2496   01 0073F    32000A0C              LW,0     =X'1FFF'          A18=0
     2497   01 00740    65000745              BIR,0    %+5               REG 0 = 2000
     2498   01 00741    48000991              EOR,0    =X'2000'          SUM=2000X
     2499   01 00742    69100744              BCS,1    %+2               NO
     2500   01 00743    68200748              BCR,2    %+5               YES
     2501   01 00744    65200745              BIR,2    %+1
     2502   01 00745    6C000000 A            RD,0     0
     2503   01 00746    69100748              BCS,1    %+2
     2504   01 00747    2E000000 A            WAIT                       ERROR HALT
     2505   01 00748    6C000000 A            RD,0     0
     2506   01 00749    6940073B              BCS,4    BLK107            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  113
A    2508                            *
     2509                            * BLOCK 108
     2510                            *
     2511                            * CHECK BIR FOR ADDER INPUTS OF A17=0, CS17=0, K17=1
     2512                            *
     2513   01 0074A    6C000000 A   BLK108   RD,0     0
     2514   01 0074B    6820074D              BCR,2    %+2
     2515   01 0074C    2E000000 A            WAIT                       REPORT
     2516   01 0074D    32100A0D              LW,1     =X'108'
     2517   01 0074E    32000A0E              LW,0     =X'3FFF'          A17=0
     2518   01 0074F    65000754              BIR,0    %+5               REG 0 = 4000
     2519   01 00750    48000993              EOR,0    =X'4000'          SUM=4000?
     2520   01 00751    69100753              BCS,1    %+2               NO
     2521   01 00752    68200757              BCR,2    %+5               YES
     2522   01 00753    65200754              BIR,2    %+1
     2523   01 00754    6C000000 A            RD,0     0
     2524   01 00755    69100757              BCS,1    %+2
     2525   01 00756    2E000000 A            WAIT                       ERROR HALT
     2526   01 00757    6C000000 A            RD,0     0
     2527   01 00758    6940074A              BCS,4    BLK108            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  114
A    2529                            *
     2530                            * BLOCK 109
     2531                            *
     2532                            * CHECK BIR FOR ADDER INPUTS OF A16=0, CS16=0, K16=1
     2533                            *
     2534   01 00759    6C000000 A   BLK109   RD,0     0
     2535   01 0075A    6820075C              BCR,2    %+2
     2536   01 0075B    2E000000 A            WAIT                       REPORT
     2537   01 0075C    32100A0F              LW,1     =X'109'
     2538   01 0075D    32000A10              LW,0     =X'7FFF'          A16=0
     2539   01 0075E    65000763              BIR,0    %+5               REG 0 = 8000
     2540   01 0075F    48000995              EOR,0    =X'8000'          SUM = 8000 ?
     2541   01 00760    69100762              BCS,1    %+2               (3
     2542   01 00761    68200766              BCR,2    %+5               YES
     2543   01 00762    65200763              BIR,2    %+1
     2544   01 00763    6C000000 A            RD,0     0
     2545   01 00764    69100766              BCS,1    %+2
     2546   01 00765    2E000000 A            WAIT                       ERROR HALT
     2547   01 00766    6C000000 A            RD,0     0
     2548   01 00767    69400759              BCS,4    BLK109            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  115
A    2550                            *
     2551                            * BLOCK 110
     2552                            *
     2553                            * CHECK BIR FOR ADDER INPUTS OF A15=0, CS15=0, K15=1
     2554                            *
     2555   01 00768    6C000000 A   BLK110   RD,0     0
     2556   01 00769    6820076B              BCR,2    %+2
     2557   01 0076A    2E000000 A            WAIT
     2558   01 0076B    32100A11              LW,1     =X'110'
     2559   01 0076C    320009DF              LW,0     =X'FFFF'          A15=0
     2560   01 0076D    65000772              BIR,0    %+5               REG 0 = 10000
     2561   01 0076E    48000997              EOR,0    =X'10000'         SUM=10000?
     2562   01 0076F    69100771              BCS,1    %+2               NO
     2563   01 00770    68200775              BCR,2    %+5               YES
     2564   01 00771    65200772              BIR,2    %+1
     2565   01 00772    6C000000 A            RD,0     0
     2566   01 00773    69100775              BCS,1    %+2
     2567   01 00774    2E000000 A            WAIT                       ERROR HALT
     2568   01 00775    6C000000 A            RD,0     0
     2569   01 00776    69400768              BCS,4    BLK110            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  116
A    2571                            *
     2572                            * BLOCK 111
     2573                            *
     2574                            * CHECK BIR FOR ADDER INPUTS OF A14=0, CS14=0, K14=1
     2575                            *
     2576   01 00777    6C000000 A   BLK111   RD,0     0
     2577   01 00778    6820077A              BCR,2    %+2
     2578   01 00779    2E000000 A            WAIT                       REPORT
     2579   01 0077A    32100A12              LW,1     =X'111'
     2580   01 0077B    32000A13              LW,0     =X'1FFFF'         A14=0
     2581   01 0077C    65000781              BIR,0    %+5               REG 0 = 20000
     2582   01 0077D    48000999              EOR,0    =X'20000'         SUM=20000?
     2583   01 0077E    69100780              BCS,1    %+2               NO
     2584   01 0077F    68200784              BCR,2    %+5               YES
     2585   01 00780    65200781              BIR,2    %+1
     2586   01 00781    6C000000 A            RD,0     0
     2587   01 00782    69100784              BCS,1    %+2
     2588   01 00783    2E000000 A            WAIT                       ERROR HALT
     2589   01 00784    6C000000 A            RD,0     0
     2590   01 00785    69400777              BCS,4    BLK111            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  117
A    2592                            *
     2593                            * BLOCK 112
     2594                            *
     2595                            * CHECK BIR FOR ADDER INPUTS OF A13=0, CS13=0, K13=1
     2596                            *
     2597   01 00786    6C000000 A   BLK112   RD,0     0
     2598   01 00787    68200789              BCR,2    %+2
     2599   01 00788    2E000000 A            WAIT                       REPORT
     2600   01 00789    32100A14              LW,1     =X'112'
     2601   01 0078A    32000A15              LW,0     =X'3FFFF'         A13=0
     2602   01 0078B    65000790              BIR,0    %+5               REG 0 = 40000
     2603   01 0078C    4800099A              EOR,0    =X'40000'         SUM=40000?
     2604   01 0078D    6910078F              BCS,1    %+2               NO
     2605   01 0078E    68200793              BCR,2    %+5               YES
     2606   01 0078F    65200790              BIR,2    %+1
     2607   01 00790    6C000000 A            RD,0     0
     2608   01 00791    69100793              BCS,1    %+2
     2609   01 00792    2E000000 A            WAIT                       ERROR HALT
     2610   01 00793    6C000000 A            RD,0     0
     2611   01 00794    69400786              BCS,4    BLK112            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  118
A    2613                            *
     2614                            * BLOCK 113
     2615                            *
     2616                            * CHECK BIR FOR ADDER INPUTS OF A12=0, CS12=0, K12=1
     2617                            *
     2618   01 00795    6C000000 A   BLK113   RD,0     0
     2619   01 00796    68200798              BCR,2    %+2
     2620   01 00797    2E000000 A            WAIT                       REPORT
     2621   01 00798    32100A16              LW,1     =X'113'
     2622   01 00799    32000A17              LW,0     =X'7FFFF'         A12=0
     2623   01 0079A    6500079F              BIR,0    %+5               REG 0 = 80000
     2624   01 0079B    4800099C              EOR,0    =X'80000'         SUM=80000?
     2625   01 0079C    6910079E              BCS,1    %+2               NO
     2626   01 0079D    682007A2              BCR,2    %+5               YES
     2627   01 0079E    6520079F              BIR,2    %+1
     2628   01 0079F    6C000000 A            RD,0     0
     2629   01 007A0    691007A2              BCS,1    %+2
     2630   01 007A1    2E000000 A            WAIT                       ERROR HALT
     2631   01 007A2    6C000000 A            RD,0     0
     2632   01 007A3    69400795              BCS,4    BLK113            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  119
A    2634                            *
     2635                            * BLOCK 114
     2636                            *
     2637                            * CHECK BIR FOR ADDER INPUTS OF A11=0, CS11=0, K11=1
     2638                            *
     2639   01 007A4    6C000000 A   BLK114   RD,0     0
     2640   01 007A5    682007A7              BCR,2    %+2
     2641   01 007A6    2E000000 A            WAIT                       REPORT
     2642   01 007A7    32100A18              LW,1     =X'114'
     2643   01 007A8    32000A19              LW,0     =X'FFFFF'         A11=0
     2644   01 007A9    650007AE              BIR,0    %+5               REG 0 = 100000
     2645   01 007AA    4800099E              EOR,0    =X'100000'        SUM=100000?
     2646   01 007AB    691007AD              BCS,1    %+2               NO
     2647   01 007AC    682007B1              BCR,2    %+5               YES
     2648   01 007AD    652007AE              BIR,2    %+1
     2649   01 007AE    6C000000 A            RD,0     0
     2650   01 007AF    691007B1              BCS,1    %+2
     2651   01 007B0    2E000000 A            WAIT                       ERROR HALT
     2652   01 007B1    6C000000 A            RD,0     0
     2653   01 007B2    694007A4              BCS,4    BLK114            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  120
A    2655                            *
     2656                            * BLOCK 115
     2657                            *
     2658                            * CHECK BIR FOR ADDER INPUTS OF A10=0, CS10=0, K10=1
     2659                            *
     2660   01 007B3    6C000000 A   BLK115   RD,0     0
     2661   01 007B4    682007B6              BCR,2    %+2
     2662   01 007B5    2E000000 A            WAIT                       REPORT
     2663   01 007B6    32100A1A              LW,1     =X'115'
     2664   01 007B7    32000A1B              LW,0     =X'1FFFFF'        A10=0
     2665   01 007B8    650007BD              BIR,0    %+5               REG 0 = 200000
     2666   01 007B9    480009A0              EOR,0    =X'200000'        SUM=200000?
     2667   01 007BA    691007BC              BCS,1    %+2               NO
     2668   01 007BB    682007C0              BCR,2    %+5               YES
     2669   01 007BC    652007BD              BIR,2    %+1
     2670   01 007BD    6C000000 A            RD,0     0
     2671   01 007BE    691007C0              BCS,1    %+2
     2672   01 007BF    2E000000 A            WAIT                       ERROR HALT
     2673   01 007C0    6C000000 A            RD,0     0
     2674   01 007C1    694007B3              BCS,4    BLK115            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  121
A    2676                            *
     2677                            * BLOCK 116
     2678                            *
     2679                            * CHECK BIR FOR ADDER INPUTS OF A9=0, CS9=0, K9=1
     2680                            *
     2681   01 007C2    6C000000 A   BLK116   RD,0     0
     2682   01 007C3    682007C5              BCR,2    %+2
     2683   01 007C4    2E000000 A            WAIT
     2684   01 007C5    32100A1C              LW,1     =X'116'
     2685   01 007C6    32000A1D              LW,0     =X'3FFFFF'        A9=0
     2686   01 007C7    650007CC              BIR,0    %+5               REG 0 = 400000
     2687   01 007C8    480009A2              EOR,0    =X'400000'        SUM=400000?
     2688   01 007C9    691007CB              BCS,1    %+2               NO
     2689   01 007CA    682007CF              BCR,2    %+5               YES
     2690   01 007CB    652007CC              BIR,2    %+1
     2691   01 007CC    6C000000 A            RD,0     0
     2692   01 007CD    691007CF              BCS,1    %+2
     2693   01 007CE    2E000000 A            WAIT                       ERROR HALT
     2694   01 007CF    6C000000 A            RD,0     0
     2695   01 007D0    694007C2              BCS,4    BLK116            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  122
A    2697                            *
     2698                            * BLOCK 117
     2699                            *
     2700                            * CHECK BIR FOR ADDER INPUTS OF A8=0, CS8=0, K8=1
     2701                            *
     2702   01 007D1    6C000000 A   BLK117   RD,0     0
     2703   01 007D2    682007D4              BCR,2    %+2
     2704   01 007D3    2E000000 A            WAIT                       REPORT
     2705   01 007D4    32100A1E              LW,1     =X'117'
     2706   01 007D5    32000A1F              LW,0     =X'7FFFFF'        A8=0
     2707   01 007D6    650007DB              BIR,0    %+5               REG 0 = 800000
     2708   01 007D7    480009A4              EOR,0    =X'800000'        SUM=800000?
     2709   01 007D8    691007DA              BCS,1    %+2               NO
     2710   01 007D9    682007DE              BCR,2    %+5               YES
     2711   01 007DA    652007DB              BIR,2    %+1
     2712   01 007DB    6C000000 A            RD,0     0
     2713   01 007DC    691007DE              BCS,1    %+2
     2714   01 007DD    2E000000 A            WAIT                       ERROR HALT
     2715   01 007DE    6C000000 A            RD,0     0
     2716   01 007DF    694007D1              BCS,4    BLK117            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  123
A    2718                            *
     2719                            * BLOCK 118
     2720                            *
     2721                            * CHECK BIR FOR ADDER INPUTS OF A7=0, CS7=0, K7=1
     2722                            *
     2723   01 007E0    6C000000 A   BLK118   RD,0     0
     2724   01 007E1    682007E3              BCR,2    %+2
     2725   01 007E2    2E000000 A            WAIT                       REPORT
     2726   01 007E3    32100A20              LW,1     =X'118'
     2727   01 007E4    32000A21              LW,0     =X'FFFFFF'        A7=0
     2728   01 007E5    650007EA              BIR,0    %+5               REG 0 = 1000000
     2729   01 007E6    480009A6              EOR,0    =X'1000000'       SUM=1000000?
     2730   01 007E7    691007E9              BCS,1    %+2               NO
     2731   01 007E8    682007ED              BCR,2    %+5               YES
     2732   01 007E9    652007EA              BIR,2    %+1
     2733   01 007EA    6C000000 A            RD,0     0
     2734   01 007EB    691007ED              BCS,1    %+2
     2735   01 007EC    2E000000 A            WAIT                       ERROR HALT
     2736   01 007ED    6C000000 A            RD,0     0
     2737   01 007EE    694007E0              BCS,4    BLK118            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  124
A    2739                            *
     2740                            * BLOCK 119
     2741                            *
     2742                            * CHECK BIR FOR ADDER INPUTS OF A6=0, CS6=0, K6=1
     2743                            *
     2744   01 007EF    6C000000 A   BLK119   RD,0     0
     2745   01 007F0    682007F2              BCR,2    %+2
     2746   01 007F1    2E000000 A            WAIT                       REPORT
     2747   01 007F2    32100A22              LW,1     =X'119'
     2748   01 007F3    32000A23              LW,0     =X'1FFFFFF'       A6=0
     2749   01 007F4    650007F9              BIR,0    %+5               REG 0 = 2000000
     2750   01 007F5    480009A8              EOR,0    =X'2000000'       SUM=2000000?
     2751   01 007F6    691007F8              BCS,1    %+2               NO
     2752   01 007F7    682007FC              BCR,2    %+5               YES
     2753   01 007F8    652007F9              BIR,2    %+1
     2754   01 007F9    6C000000 A            RD,0     0
     2755   01 007FA    691007FC              BCS,1    %+2
     2756   01 007FB    2E000000 A            WAIT                       ERROR HALT
     2757   01 007FC    6C000000 A            RD,0     0
     2758   01 007FD    694007EF              BCS,4    BLK119            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  125
A    2760                            *
     2761                            * BLOCK 120
     2762                            *
     2763                            * CHECK BIR FOR ADDER INPUTS OF A5=0, CS5=0, K5=1
     2764                            *
     2765   01 007FE    6C000000 A   BLK120   RD,0     0
     2766   01 007FF    68200801              BCR,2    %+2
     2767   01 00800    2E000000 A            WAIT                       REPORT
     2768   01 00801    32100A24              LW,1     =X'120'
     2769   01 00802    32000A25              LW,0     =X'3FFFFFF'       A5=0
     2770   01 00803    65000808              BIR,0    %+5               REG 0 = 4000000
     2771   01 00804    480009AA              EOR,0    =X'4000000'       SUM=4000000?
     2772   01 00805    69100807              BCS,1    %+2               NO
     2773   01 00806    6820080B              BCR,2    %+5               YES
     2774   01 00807    65200808              BIR,2    %+1
     2775   01 00808    6C000000 A            RD,0     0
     2776   01 00809    6910080B              BCS,1    %+2
     2777   01 0080A    2E000000 A            WAIT                       ERROR HALT
     2778   01 0080B    6C000000 A            RD,0     0
     2779   01 0080C    694007FE              BCS,4    BLK120            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  126
A    2781                            *
     2782                            * BLOCK 121
     2783                            *
     2784                            * CHECK BIR FOR ADDER INPUTS OF A4=0, CS4=0, K4=1
     2785                            *
     2786   01 0080D    6C000000 A   BLK121   RD,0     0
     2787   01 0080E    68200810              BCR,2    %+2
     2788   01 0080F    2E000000 A            WAIT                       REPORT
     2789   01 00810    32100A26              LW,1     =X'121'
     2790   01 00811    32000A27              LW,0     =X'7FFFFFF'       A4=0
     2791   01 00812    65000817              BIR,0    %+5               REG 0 = 8000000
     2792   01 00813    480009AC              EOR,0    =X'8000000'       SUM=8000000?
     2793   01 00814    69100816              BCS,1    %+2               NO
     2794   01 00815    6820081A              BCR,2    %+5               YES
     2795   01 00816    65200817              BIR,2    %+1
     2796   01 00817    6C000000 A            RD,0     0
     2797   01 00818    6910081A              BCS,1    %+2
     2798   01 00819    2E000000 A            WAIT                       ERROR HALT
     2799   01 0081A    6C000000 A            RD,0     0
     2800   01 0081B    6940080D              BCS,4    BLK121            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  127
A    2802                            *
     2803                            * BLOCK 122
     2804                            *
     2805                            * CHECK BIR FOR ADDER INPUTS OF A3=0, CS3=0, K3=1
     2806                            *
     2807   01 0081C    6C000000 A   BLK122   RD,0     0
     2808   01 0081D    6820081F              BCR,2    %+2
     2809   01 0081E    2E000000 A            WAIT                       REPORT
     2810   01 0081F    32100A28              LW,1     =X'122'
     2811   01 00820    32000A29              LW,0     =X'FFFFFFF'       A3=0
     2812   01 00821    65000826              BIR,0    %+5               REG 0 = 10000000
     2813   01 00822    480009AE              EOR,0    =X'10000000'      SUM=10000000?
     2814   01 00823    69100825              BCS,1    %+2               NO
     2815   01 00824    68200829              BCR,2    %+5               YES
     2816   01 00825    65200826              BIR,2    %+1
     2817   01 00826    6C000000 A            RD,0     0
     2818   01 00827    69100829              BCS,1    %+2
     2819   01 00828    2E000000 A            WAIT                       ERROR WAIT
     2820   01 00829    6C000000 A            RD,0     0
     2821   01 0082A    6940081C              BCS,4    BLK122            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  128
A    2823                            *
     2824                            * BLOCK 123
     2825                            *
     2826                            * CHECK BIR FOR ADDER INPUTS OF A2=0, CS2=0, K2=1
     2827                            *
     2828   01 0082B    6C000000 A   BLK123   RD,0     0
     2829   01 0082C    6820082E              BCR,2    %+2
     2830   01 0082D    2E000000 A            WAIT                       REPORT
     2831   01 0082E    32100A2A              LW,1     =X'123'
     2832   01 0082F    32000A2B              LW,0     =X'1FFFFFFF'      A2=0
     2833   01 00830    65000835              BIR,0    %+5               REG 0 = 20000000
     2834   01 00831    480009B0              EOR,0    =X'20000000'      SUM=20000000?
     2835   01 00832    69100834              BCS,1    %+2               NO
     2836   01 00833    68200838              BCR,2    %+5               YES
     2837   01 00834    65200835              BIR,2    %+1
     2838   01 00835    6C000000 A            RD,0     0
     2839   01 00836    69100838              BCS,1    %+2
     2840   01 00837    2E000000 A            WAIT                       ERROR HALT
     2841   01 00838    6C000000 A            RD,0     0
     2842   01 00839    6940082B              BCS,4    BLK123            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  129
A    2844                            *
     2845                            * BLOCK 124
     2846                            *
     2847                            * CHECK BIR FOR ADDER INPUTS OF A1=0, CS1=0, K1=1
     2848                            *
     2849   01 0083A    6C000000 A   BLK124   RD,0     0
     2850   01 0083B    6820083D              BCR,2    %+2
     2851   01 0083C    2E000000 A            WAIT                       REPORT
     2852   01 0083D    32100A2C              LW,1     =X'124'
     2853   01 0083E    32000A2D              LW,0     =X'3FFFFFFF'      A1=0
     2854   01 0083F    65000844              BIR,0    %+5               REG 0 = 40000000
     2855   01 00840    480009B2              EOR,0    =X'40000000'      SUM=40000000?
     2856   01 00841    69100843              BCS,1    %+2               NO
     2857   01 00842    68200847              BCR,2    %+5               YES
     2858   01 00843    65200844              BIR,2    %+1
     2859   01 00844    6C000000 A            RD,0     0
     2860   01 00845    69100847              BCS,1    %+2
     2861   01 00846    2E000000 A            WAIT                       ERROR HALT
     2862   01 00847    6C000000 A            RD,0     0
     2863   01 00848    6940083A              BCS,4    BLK124            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  130
A    2865                            *
     2866                            * BLOCK 125
     2867                            *
     2868                            * CHECK BIR FOR ADDER INPUTS OF A0=0, CS0=0, K0=1
     2869                            *
     2870   01 00849    6C000000 A   BLK125   RD,0     0
     2871   01 0084A    6820084C              BCR,2    %+2
     2872   01 0084B    2E000000 A            WAIT                       REPORT
     2873   01 0084C    32100A2E              LW,1     =X'125'
     2874   01 0084D    32000A2F              LW,0     =X'7FFFFFFF'      A0=0
     2875   01 0084E    65000850              BIR,0    %+2               REG 0 = 80000000
     2876   01 0084F    68000854              B        %+5               ERROR
     2877   01 00850    480009B4              EOR,0    =X'80000000'      SUM=80000000?
     2878   01 00851    69100853              BCS,1    %+2               NO
     2879   01 00852    68200857              BCR,2    %+5               YES
     2880   01 00853    65200854              BIR,2    %+1
     2881   01 00854    6C000000 A            RD,0     0
     2882   01 00855    69100857              BCS,1    %+2
     2883   01 00856    2E000000 A            WAIT                       ERROR HALT
     2884   01 00857    6C000000 A            RD,0     0
     2885   01 00858    69400849              BCS,4    BLK125            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  131
A    2887                            *
     2888                            * BLOCK 126
     2889                            *
     2890                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 1011 AND CHECK BCS,4
     2891                            *    FOR PROPER DETECTION OF UCC
     2892                            *
     2893   01 00859    6C000000 A   BLK126   RD,0     0
     2894   01 0085A    6820085C              BCR,2    %+2
     2895   01 0085B    2E000000 A            WAIT                       REPORT
     2896   01 0085C    32100A30              LW,1     =X'126'
     2897   01 0085D    0E000860              LPSD,0   W1                SET CC=B, SET INHIBITS, SET P=W1+3
     2898   01 0085E    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     2899                                     BOUND    8
     2900   01 00860    B0000863     W1       GEN,4,28 B,%+3             GENERATE PSW1
     2901   01 00861    07000000 A            DATA     X'7000000'        PSW2 TO SET INHIBITS
     2902   01 00862    2E000000 A            WAIT                       ERROR
     2903   01 00863    69400865              BCS,4    %+2               ERROR IF BRANCH OCCURS
     2904   01 00864    68000869              B        %+5
     2905   01 00865    65200866              BIR,2    %+1               ERROR DUE TO SET CONDITION OF CC2
     2906   01 00866    6C000000 A            RD,0     0
     2907   01 00867    69100869              BCS,1    %+2
     2908   01 00868    2E000000 A            WAIT                       ERROR HALT
     2909   01 00869    6C000000 A            RD,0     0
     2910   01 0086A    69400859              BCS,4    BLK126            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  132
A    2912                            *
     2913                            * BLOCK 127
     2914                            *
     2915                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 1011 AND CHECK BCR,4
     2916                            *    FOR PROPER DETECTION OF UCC
     2917                            *
     2918   01 0086B    6C000000 A   BLK127   RD,0     0
     2919   01 0086C    6820086E              BCR,2    %+2
     2920   01 0086D    2E000000 A            WAIT                       REPORT
     2921   01 0086E    32100A31              LW,1     =X'127'
     2922   01 0086F    0E000872              LPSD,0   W2                SET CC=B, SET INHIBITS, SET P=W2+3
     2923   01 00870    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     2924                                     BOUND    8
     2925   01 00872    B0000875     W2       GEN,4,28 B,%+3             GENERATE PSW1
     2926   01 00873    07000000 A            DATA     X'7000000'        PSW2
     2927   01 00874    2E000000 A            WAIT                       ERROR
     2928   01 00875    6840087A              BCR,4    %+5
     2929   01 00876    65200877              BIR,2    %+1               ERROR - CC2 SET
     2930   01 00877    6C000000 A            RD,0     0
     2931   01 00878    6910087A              BCS,1    %+2
     2932   01 00879    2E000000 A            WAIT                       ERROR HALT
     2933   01 0087A    6C000000 A            RD,0     0
     2934   01 0087B    6940086B              BCS,4    BLK127            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  133
A    2936                            *
     2937                            * BLOCK 128
     2938                            *
     2939                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 0111 AND CHECK BCS,8
     2940                            *    FOR PROPER DETECTION OF UCC
     2941                            *
     2942   01 0087C    6C000000 A   BLK128   RD,0     0
     2943   01 0087D    6820087F              BCR,2    %+2
     2944   01 0087E    2E000000 A            WAIT                       REPORT
     2945   01 0087F    32100A32              LW,1     =X'128'
     2946   01 00880    0E000882              LPSD,0   W3                SET CC=7, SET INHIBITD, SET P=W3+3
     2947   01 00881    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     2948                                     BOUND    8
     2949   01 00882    70000885     W3       GEN,4,28 7,%+3             GENERATE PSW1
     2950   01 00883    07000000 A            DATA     X'7000000'        PSW2
     2951   01 00884    2E000000 A            WAIT                       ERROR
     2952   01 00885    69800887              BCS,8    %+2
     2953   01 00886    6800088B              B        %+5
     2954   01 00887    65200888              BIR,2    %+1               ERROR - CC1 SET
     2955   01 00888    6C000000 A            RD,0     0
     2956   01 00889    6910088B              BCS,1    %+2
     2957   01 0088A    2E000000 A            WAIT                       ERROR HALT
     2958   01 0088B    6C000000 A            RD,0     0
     2959   01 0088C    6940087C              BCS,4    BLK128            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  134
A    2961                            *
     2962                            * BLOCK 129
     2963                            *
     2964                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 0111 AND CHECK BCR,8
     2965                            *    FOR PROPER DETECTION OF UCC
     2966                            *
     2967   01 0088D    6C000000 A   BLK129   RD,0     0
     2968   01 0088E    68200890              BCR,2    %+2
     2969   01 0088F    2E000000 A            WAIT                       REPORT
     2970   01 00890    32100A33              LW,1     =X'129'
     2971   01 00891    0E000894              LPSD,0   W4                SET CC=7, SET INHIBITS, SET P=W4+3
     2972   01 00892    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     2973                                     BOUND    8
     2974   01 00894    70000897     W4       GEN,4,28 7,%+3             GENERATE PSW1
     2975   01 00895    07000000 A            DATA     X'7000000'        PSW2
     2976   01 00896    2E000000 A            WAIT                       ERROR
     2977   01 00897    6880089C              BCR,8    %+5
     2978   01 00898    65200899              BIR,2    %+1               ERROR - CC1 SET
     2979   01 00899    6C000000 A            RD,0     0
     2980   01 0089A    6910089C              BCS,1    %+2
     2981   01 0089B    2E000000 A            WAIT                       ERROR HALT
     2982   01 0089C    6C000000 A            RD,0     0
     2983   01 0089D    6940088D              BCS,4    BLK129            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  135
A    2985                            *
     2986                            * BLOCK 130
     2987                            *
     2988                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 0100 AND CHECK BCR,4
     2989                            *    FOR PROPER DETECTION OF UCC
     2990                            *
     2991   01 0089E    6C000000 A   BLK130   RD,0     0
     2992   01 0089F    682008A1              BCR,2    %+2
     2993   01 008A0    2E000000 A            WAIT                       REPORT
     2994   01 008A1    32100A34              LW,1     =X'130'
     2995   01 008A2    0E0008A4              LPSD,0   W5                SET CC=4, SET INHIBITS, SET P=W5+3
     2996   01 008A3    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     2997                                     BOUND    8
     2998   01 008A4    400008A7     W5       GEN,4,28 4,%+3             GENERATE PSW1
     2999   01 008A5    07000000 A            DATA     X'7000000'        PSW2
     3000   01 008A6    2E000000 A            WAIT                       ERROR
     3001   01 008A7    684008A9              BCR,4    %+2
     3002   01 008A8    680008AD              B        %+5
     3003   01 008A9    652008AA              BIR,2    %+1               ERROR - CC2 RESET
     3004   01 008AA    6C000000 A            RD,0     0
     3005   01 008AB    691008AD              BCS,1    %+2
     3006   01 008AC    2E000000 A            WAIT                       ERROR HALT
     3007   01 008AD    6C000000 A            RD,0     0
     3008   01 008AE    6940089E              BCS,4    BLK130            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  136
A    3010                            *
     3011                            * BLOCK 131
     3012                            *
     3013                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 0100 AND CHECK BCS,4
     3014                            *    FOR PROPER DETECTION OF UCC
     3015                            *
     3016   01 008AF    6C000000 A   BLK131   RD,0     0
     3017   01 008B0    682008B2              BCR,2    %+2
     3018   01 008B1    2E000000 A            WAIT                       REPORT
     3019   01 008B2    32100A35              LW,1     =X'131'
     3020   01 008B3    0E0008B6              LPSD,0   W6                SET CC=4, SET INHIBITS, SET P=W6+3
     3021   01 008B4    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     3022                                     BOUND    8
     3023   01 008B6    400008B9     W6       GEN,4,28 4,%+3             GENERATE PSW1
     3024   01 008B7    07000000 A            DATA     X'7000000'        PSW2
     3025   01 008B8    2E000000 A            WAIT                       ERROR
     3026   01 008B9    694008BE              BCS,4    %+5
     3027   01 008BA    652008BB              BIR,2    %+1               ERROR - CC2 RESET
     3028   01 008BB    6C000000 A            RD,0     0
     3029   01 008BC    691008BE              BCS,1    %+2
     3030   01 008BD    2E000000 A            WAIT                       ERROR HALT
     3031   01 008BE    6C000000 A            RD,0     0
     3032   01 008BF    694008AF              BCS,4    BLK131            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  137
A    3034                            *
     3035                            * BLOCK 132
     3036                            *
     3037                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 1000 AND CHECK BCR,8
     3038                            *    FOR PROPER DETECTION OF UCC
     3039                            *
     3040   01 008C0    6C000000 A   BLK132   RD,0     0
     3041   01 008C1    682008C3              BCR,2    %+2
     3042   01 008C2    2E000000 A            WAIT                       REPORT
     3043   01 008C3    32100A36              LW,1     =X'132'
     3044   01 008C4    0E0008C6              LPSD,0   W7                SET CC=8, SET INHIBITS, SET P=W7+3
     3045   01 008C5    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     3046                                     BOUND    8
     3047   01 008C6    800008C9     W7       GEN,4,28 8,%+3             GENERATE PSW1
     3048   01 008C7    07000000 A            DATA     X'7000000'        PSW2
     3049   01 008C8    2E000000 A            WAIT                       ERROR
     3050   01 008C9    688008CB              BCR,8    %+2
     3051   01 008CA    680008CF              B        %+5
     3052   01 008CB    652008CC              BIR,2    %+1               ERROR - CC1 RESET
     3053   01 008CC    6C000000 A            RD,0     0
     3054   01 008CD    691008CF              BCS,1    %+2
     3055   01 008CE    2E000000 A            WAIT                       ERROR HALT
     3056   01 008CF    6C000000 A            RD,0     0
     3057   01 008D0    694008C0              BCS,4    BLK132            LOOP/PROCEED
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  138
A    3059                            *
     3060                            * BLOCK 133
     3061                            *
     3062                            * USING LPSD, LOAD CC WITH BIT CONFIGURATION OF 1000 AND CHECK BCS,8
     3063                            *    FOR PROPER DETECTION OF UCC
     3064                            *
     3065   01 008D1    6C000000 A   BLK133   RD,0     0
     3066   01 008D2    682008D4              BCR,2    %+2
     3067   01 008D3    2E000000 A            WAIT                       REPORT
     3068   01 008D4    32100A37              LW,1     =X'133'
     3069   01 008D5    0E0008D8              LPSD,0   W8                SET CC=7, SET INHIBITS, SET P=W8+3
     3070   01 008D6    2E000000 A            WAIT                       ERROR IN EXECUTION OF LPSD
     3071                                     BOUND    8
     3072   01 008D8    800008DB     W8       GEN,4,28 8,%+3             GENERATE PSW1
     3073   01 008D9    07000000 A            DATA     X'7000000'        PSW2
     3074   01 008DA    2E000000 A            WAIT                       ERROR
     3075   01 008DB    698008E0              BCS,8    %+5
     3076   01 008DC    652008DD              BIR,2    %+1               ERROR - CC1 RESET
     3077   01 008DD    6C000000 A            RD,0     0
     3078   01 008DE    691008E0              BCS,1    %+2
     3079   01 008DF    2E000000 A            WAIT                       ERROR HALT
     3080   01 008E0    6C000000 A            RD,0     0
     3081   01 008E1    694008D1              BCS,4    BLK133            LOOP/PROCEED

     3083   01 008E2    22400100 A            LI,4     X'100'            SHORT BEEP FOR SUCCESS          *G02
     3084   01 008E3    6D000041 A            WD,0     X'41'
     3085   01 008E4    644008E4              BDR,4    %
     3086   01 008E5    6D000040 A            WD,0     X'40'

     3088   01 008E6    68000142              B        RETURN            CONTINUE THE TESTING
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  139
A    3090                            *
     3091                            * TRAP PROCESSING SWITCH TO SET UP IDENTIFICATION OF SPURIOUS TRAPS
     3092                            *
     3093                                     BOUND    8
     3094   01 008E8    00000000 A   NONOP    DATA     0
     3095   01 008E9    00000000 A            DATA     0
     3096   01 008EA    00000948              DATA     TRAP40
     3097   01 008EB    00000000 A            DATA     0
     3098   01 008EC    00000000 A   UNIMP    DATA     0
     3099   01 008ED    00000000 A            DATA     0
     3100   01 008EE    0000094A              DATA     TRAP41
     3101   01 008EF    00000000 A            DATA     0
     3102   01 008F0    00000000 A   STACK    DATA     0
     3103   01 008F1    00000000 A            DATA     0
     3104   01 008F2    0000094C              DATA     TRAP42
     3105   01 008F3    00000000 A            DATA     0
     3106   01 008F4    00000000 A   OFLO     DATA     0
     3107   01 008F5    00000000 A            DATA     0
     3108   01 008F6    0000094E              DATA     TRAP43
     3109   01 008F7    00000000 A            DATA     0
     3110   01 008F8    00000000 A   FLOAT    DATA     0
     3111   01 008F9    00000000 A            DATA     0
     3112   01 008FA    00000950              DATA     TRAP44
     3113   01 008FB    00000000 A            DATA     0
     3114   01 008FC    00000000 A   DEC      DATA     0
     3115   01 008FD    00000000 A            DATA     0
     3116   01 008FE    00000952              DATA     TRAP45
     3117   01 008FF    00000000 A            DATA     0
     3118   01 00900    00000000 A   TIMER    DATA     0
     3119   01 00901    00000000 A            DATA     0
     3120   01 00902    00000954              DATA     TRAP46
     3121   01 00903    00000000 A            DATA     0
     3122   01 00904    00000000 A   TUNASS   DATA     0
     3123   01 00905    00000000 A            DATA     0
     3124   01 00906    00000956              DATA     TRAPUN
     3125   01 00907    00000000 A            DATA     0
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  140
A    3127   01 00908    00000000 A   CALL1    DATA     0
     3128   01 00909    00000000 A            DATA     0
     3129   01 0090A    00000958              DATA     TRAP48
     3130   01 0090B    00000000 A            DATA     0
     3131   01 0090C    00000000 A   CALL2    DATA     0
     3132   01 0090D    00000000 A            DATA     0
     3133   01 0090E    0000095A              DATA     TRAP49
     3134   01 0090F    00000000 A            DATA     0
     3135   01 00910    00000000 A   CALL3    DATA     0
     3136   01 00911    00000000 A            DATA     0
     3137   01 00912    0000095C              DATA     TRAP4A
     3138   01 00913    00000000 A            DATA     0
     3139   01 00914    00000000 A   CALL4    DATA     0
     3140   01 00915    00000000 A            DATA     0
     3141   01 00916    0000095E              DATA     TRAP4B
     3142   01 00917    00000000 A            DATA     0
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  141
A    3144                            *
     3145                            * INTERRUPT SWITCH TO SET UP IDENTIFICATION OF SPURIOUS INTERRUPTS
     3146                            *
     3147                                     BOUND    8
     3148   01 00918    00000000 A   POWON    DATA     0
     3149   01 00919    00000000 A            DATA     0
     3150   01 0091A    00000960              DATA     INT50
     3151   01 0091B    00000000 A            DATA     0
     3152   01 0091C    00000000 A   POWOFF   DATA     0
     3153   01 0091D    00000000 A            DATA     0
     3154   01 0091E    00000962              DATA     INT51
     3155   01 0091F    00000000 A            DATA     0
     3156   01 00920    00000000 A   PULSE1   DATA     0
     3157   01 00921    00000000 A   PULSE2   DATA     0
     3158   01 00922    00000000 A   PULSE3   DATA     0
     3159   01 00923    00000000 A   PULSE4   DATA     0
     3160   01 00924    00000000 A   MEMPAR   DATA     0
     3161   01 00925    00000000 A            DATA     0
     3162   01 00926    00000964              DATA     INT56
     3163   01 00927    00000000 A            DATA     0
     3164   01 00928    00000000 A   UNASIN   DATA     0
     3165   01 00929    00000000 A            DATA     0
     3166   01 0092A    00000966              DATA     IUNASS
     3167   01 0092B    00000000 A            DATA     0
     3168   01 0092C    00000000 A   COUNT1   DATA     0
     3169   01 0092D    00000000 A            DATA     0
     3170   01 0092E    00000968              DATA     INT58
     3171   01 0092F    00000000 A            DATA     0
     3172   01 00930    00000000 A   COUNT2   DATA     0
     3173   01 00931    00000000 A            DATA     0
     3174   01 00932    0000096A              DATA     INT59
     3175   01 00933    00000000 A            DATA     0
     3176   01 00934    00000000 A   COUNT3   DATA     0
     3177   01 00935    00000000 A            DATA     0
     3178   01 00936    0000096C              DATA     INT5A
     3179   01 00937    00000000 A            DATA     0
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  142
A    3181   01 00938    00000000 A   COUNT4   DATA     0
     3182   01 00939    00000000 A            DATA     0
     3183   01 0093A    0000096E              DATA     INT5B
     3184   01 0093B    00000000 A            DATA     0
     3185   01 0093C    00000000 A   INOUT    DATA     0
     3186   01 0093D    00000000 A            DATA     0
     3187   01 0093E    00000970              DATA     INT5C
     3188   01 0093F    00000000 A            DATA     0
     3189   01 00940    00000000 A   PANEL    DATA     0
     3190   01 00941    00000000 A            DATA     0
     3191   01 00942    00000972              DATA     INT5D
     3192   01 00943    00000000 A            DATA     0
     3193   01 00944    00000000 A   EXTERN   DATA     0
     3194   01 00945    00000000 A            DATA     0
     3195   01 00946    00000974              DATA     EXTINT
     3196   01 00947    00000000 A            DATA     0
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  143
A    3198                            *
     3199                            * TRAP HALTS FOR IDENTIFICATION OF SPURIOUS TRAPS
     3200                            *
     3201   01 00948    2E000000 A   TRAP40   WAIT                       NON-ALLOWED OPERATION
     3202   01 00949    68000140              B        START
     3203   01 0094A    2E000000 A   TRAP41   WAIT                       UNIMPLEMENTED INSTRUCTION
     3204   01 0094B    68000140              B        START
     3205   01 0094C    2E000000 A   TRAP42   WAIT                       PUSH-DOWN STACK LIMIT REACHED
     3206   01 0094D    68000140              B        START
     3207   01 0094E    2E000000 A   TRAP43   WAIT                       FIXED-POINT ARITHMETIC OVERFLOW
     3208   01 0094F    68000140              B        START
     3209   01 00950    2E000000 A   TRAP44   WAIT                       FLOATING POINT FAULT
     3210   01 00951    68000140              B        START
     3211   01 00952    2E000000 A   TRAP45   WAIT                       DECIMAL ARITHMETIC FAULT
     3212   01 00953    68000140              B        START
     3213   01 00954    2E000000 A   TRAP46   WAIT                       WATCHDOG TIMER RUNOUT
     3214   01 00955    68000140              B        START
     3215   01 00956    2E000000 A   TRAPUN   WAIT                       UNASSIGNED TRAP 47, 4C-4F
     3216   01 00957    68000140              B        START
     3217   01 00958    2E000000 A   TRAP48   WAIT                       CALL 1
     3218   01 00959    68000140              B        START
     3219   01 0095A    2E000000 A   TRAP49   WAIT                       CALL 2
     3220   01 0095B    68000140              B        START
     3221   01 0095C    2E000000 A   TRAP4A   WAIT                       CALL 3
     3222   01 0095D    68000140              B        START
     3223   01 0095E    2E000000 A   TRAP4B   WAIT                       CALL 4
     3224   01 0095F    68000140              B        START
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  144
A    3226                            *
     3227                            * INTERRUPT HALTS FOR IDENTIFICATION OF SPURIOUS INTERRUPTS
     3228                            *
     3229   01 00960    2E000000 A   INT50    WAIT                       POWER ON
     3230   01 00961    0E000976              LPSD,0   RESTART
     3231   01 00962    2E000000 A   INT51    WAIT                       POWER OFF
     3232   01 00963    0E000976              LPSD,0   RESTART
     3233   01 00964    2E000000 A   INT56    WAIT                       MEMORY PARITY
     3234   01 00965    0E000976              LPSD,0   RESTART
     3235   01 00966    2E000000 A   IUNASS   WAIT                       UNASSIGNED INTERRUPT 57, 5E, OR 5F
     3236   01 00967    0E000976              LPSD,0   RESTART
     3237   01 00968    2E000000 A   INT58    WAIT                       COUNTER 1 ZERO
     3238   01 00969    0E000976              LPSD,0   RESTART
     3239   01 0096A    2E000000 A   INT59    WAIT                       COUNTER 2 ZERO
     3240   01 0096B    0E000976              LPSD,0   RESTART
     3241   01 0096C    2E000000 A   INT5A    WAIT                       COUNTER 3 ZERO
     3242   01 0096D    0E000976              LPSD,0   RESTART
     3243   01 0096E    2E000000 A   INT5B    WAIT                       COUNTER 4 ZERO
     3244   01 0096F    0E000976              LPSD,0   RESTART
     3245   01 00970    2E000000 A   INT5C    WAIT                       INPUT/OUTPUT
     3246   01 00971    0E000976              LPSD,0   RESTART
     3247   01 00972    2E000000 A   INT5D    WAIT                       PANEL INTERRUPT
     3248   01 00973    0E000976              LPSD,0   RESTART
     3249   01 00974    2E000000 A   EXTINT   WAIT                       EXTERNAL GROUP 2-15
     3250   01 00975    0E000976              LPSD,0   RESTART
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  145
A    3252                                     BOUND    8
     3253   01 00976    00000140     RESTART  DATA     START
     3254   01 00977    00000000 A            DATA     0
     3255   01 00978    00000000 A   T1       DATA     0
     3256         01 00140                    END      START
            01 00979    00000000 A
            01 0097A    00000001 A
            01 0097B    00000002 A
            01 0097C    00000003 A
            01 0097D    00000004 A
            01 0097E    00000005 A
            01 0097F    00000008 A
            01 00980    00000006 A
            01 00981    00000010 A
            01 00982    00000007 A
            01 00983    00000020 A
            01 00984    00000040 A
            01 00985    00000009 A
            01 00986    00000080 A
            01 00987    00000100 A
            01 00988    00000011 A
            01 00989    00000200 A
            01 0098A    00000012 A
            01 0098B    00000400 A
            01 0098C    00000013 A
            01 0098D    00000800 A
            01 0098E    00000014 A
            01 0098F    00001000 A
            01 00990    00000015 A
            01 00991    00002000 A
            01 00992    00000016 A
            01 00993    00004000 A
            01 00994    00000017 A
            01 00995    00008000 A
            01 00996    00000018 A
            01 00997    00010000 A
            01 00998    00000019 A
            01 00999    00020000 A
            01 0099A    00040000 A
            01 0099B    00000021 A
            01 0099C    00080000 A
            01 0099D    00000022 A
            01 0099E    00100000 A
            01 0099F    00000023 A
            01 009A0    00200000 A
            01 009A1    00000024 A
            01 009A2    00400000 A
            01 009A3    00000025 A
            01 009A4    00800000 A
            01 009A5    00000026 A
            01 009A6    01000000 A
            01 009A7    00000027 A
            01 009A8    02000000 A
            01 009A9    00000028 A
            01 009AA    04000000 A
            01 009AB    00000029 A
            01 009AC    08000000 A
            01 009AD    00000030 A
            01 009AE    10000000 A
            01 009AF    00000031 A
            01 009B0    20000000 A
            01 009B1    00000032 A
            01 009B2    40000000 A
            01 009B3    00000033 A
            01 009B4    80000000 A
            01 009B5    00000034 A
            01 009B6    00000035 A
            01 009B7    00000036 A
            01 009B8    FFFFFFFF A
            01 009B9    00000037 A
            01 009BA    00000038 A
            01 009BB    00000039 A
            01 009BC    00000041 A
            01 009BD    00000042 A
            01 009BE    00000043 A
            01 009BF    00000044 A
            01 009C0    00000045 A
            01 009C1    00000046 A
            01 009C2    00000047 A
            01 009C3    00000048 A
            01 009C4    00000049 A
            01 009C5    00000050 A
            01 009C6    00000051 A
            01 009C7    00000052 A
            01 009C8    00000053 A
            01 009C9    00000054 A
            01 009CA    00000055 A
            01 009CB    00000056 A
            01 009CC    00000057 A
            01 009CD    00000058 A
            01 009CE    00000059 A
            01 009CF    00000060 A
            01 009D0    00000061 A
            01 009D1    00000062 A
            01 009D2    00000063 A
            01 009D3    00000064 A
            01 009D4    00000065 A
            01 009D5    00000066 A
            01 009D6    00000067 A
            01 009D7    00000068 A
            01 009D8    00000069 A
            01 009D9    00000070 A
            01 009DA    A5A5A5A5 A
            01 009DB    5A5AA5A5 A
            01 009DC    FFFF0000 A
            01 009DD    00000071 A
            01 009DE    A5A55A5A A
            01 009DF    0000FFFF A
            01 009E0    00000072 A
            01 009E1    5A5A5A5A A
            01 009E2    00000073 A
            01 009E3    00000074 A
            01 009E4    00000075 A
            01 009E5    00000076 A
            01 009E6    00000077 A
            01 009E7    00000078 A
            01 009E8    00000079 A
            01 009E9    00000081 A
            01 009EA    00000083 A
            01 009EB    00000084 A
            01 009EC    00000085 A
            01 009ED    00000086 A
            01 009EE    00000087 A
            01 009EF    00000088 A
            01 009F0    00000089 A
            01 009F1    00000090 A
            01 009F2    00000091 A
            01 009F3    00000092 A
            01 009F4    00000093 A
            01 009F5    FFFFFFFE A
            01 009F6    00000094 A
            01 009F7    00000095 A
            01 009F8    00000096 A
            01 009F9    00000097 A
            01 009FA    00000098 A
            01 009FB    0000000F A
            01 009FC    00000099 A
            01 009FD    0000001F A
            01 009FE    0000003F A
            01 009FF    00000101 A
            01 00A00    0000007F A
            01 00A01    00000102 A
            01 00A02    000000FF A
            01 00A03    00000103 A
            01 00A04    000001FF A
            01 00A05    00000104 A
            01 00A06    000003FF A
            01 00A07    00000105 A
            01 00A08    000007FF A
            01 00A09    00000106 A
            01 00A0A    00000FFF A
            01 00A0B    00000107 A
            01 00A0C    00001FFF A
            01 00A0D    00000108 A
            01 00A0E    00003FFF A
            01 00A0F    00000109 A
            01 00A10    00007FFF A
            01 00A11    00000110 A
            01 00A12    00000111 A
            01 00A13    0001FFFF A
            01 00A14    00000112 A
            01 00A15    0003FFFF A
            01 00A16    00000113 A
            01 00A17    0007FFFF A
            01 00A18    00000114 A
            01 00A19    000FFFFF A
            01 00A1A    00000115 A
            01 00A1B    001FFFFF A
            01 00A1C    00000116 A
            01 00A1D    003FFFFF A
            01 00A1E    00000117 A
            01 00A1F    007FFFFF A
            01 00A20    00000118 A
            01 00A21    00FFFFFF A
            01 00A22    00000119 A
            01 00A23    01FFFFFF A
            01 00A24    00000120 A
            01 00A25    03FFFFFF A
            01 00A26    00000121 A
            01 00A27    07FFFFFF A
            01 00A28    00000122 A
            01 00A29    0FFFFFFF A
            01 00A2A    00000123 A
            01 00A2B    1FFFFFFF A
            01 00A2C    00000124 A
            01 00A2D    3FFFFFFF A
            01 00A2E    00000125 A
            01 00A2F    7FFFFFFF A
            01 00A30    00000126 A
            01 00A31    00000127 A
            01 00A32    00000128 A
            01 00A33    00000129 A
            01 00A34    00000130 A
            01 00A35    00000131 A
            01 00A36    00000132 A
            01 00A37    00000133 A

  CONTROL SECTION SUMMARY: 01 00A38   PT 0
  * NO UNDEFINED SYMBOLS
  *    ERROR SEVERITY LEVEL: 0
  * NO ERROR LINES
1 C00   23:12 JUN 20,'83    TELEFILE CPU DIAGNOSTIC, VERIFY 960-0306-G02                          PAGE  146
A  A                 33-EQU
   B                 34-EQU     2900/GEN     2925/GEN
   BLK1             317-RD       329/BCS
   BLK10            496-RD       509/BCS
   BLK100          2345-RD      2359/BCS
   BLK101          2366-RD      2380/BCS
   BLK102          2387-RD      2401/BCS
   BLK103          2408-RD      2422/BCS
   BLK104          2429-RD      2443/BCS
   BLK105          2450-RD      2464/BCS
   BLK106          2471-RD      2485/BCS
   BLK107          2492-RD      2506/BCS
   BLK108          2513-RD      2527/BCS
   BLK109          2534-RD      2548/BCS
   BLK11            516-RD       529/BCS
   BLK110          2555-RD      2569/BCS
   BLK111          2576-RD      2590/BCS
   BLK112          2597-RD      2611/BCS
   BLK113          2618-RD      2632/BCS
   BLK114          2639-RD      2653/BCS
   BLK115          2660-RD      2674/BCS
   BLK116          2681-RD      2695/BCS
   BLK117          2702-RD      2716/BCS
   BLK118          2723-RD      2737/BCS
   BLK119          2744-RD      2758/BCS
   BLK12            536-RD       549/BCS
   BLK120          2765-RD      2779/BCS
   BLK121          2786-RD      2800/BCS
   BLK122          2807-RD      2821/BCS
   BLK123          2828-RD      2842/BCS
   BLK124          2849-RD      2863/BCS
   BLK125          2870-RD      2885/BCS
   BLK126          2893-RD      2910/BCS
   BLK127          2918-RD      2934/BCS
   BLK128          2942-RD      2959/BCS
   BLK129          2967-RD      2983/BCS
   BLK13            556-RD       569/BCS
   BLK130          2991-RD      3008/BCS
   BLK131          3016-RD      3032/BCS
   BLK132          3040-RD      3057/BCS
   BLK133          3065-RD      3081/BCS
   BLK14            576-RD       589/BCS
   BLK15            596-RD       609/BCS
   BLK16            616-RD       629/BCS
   BLK17            636-RD       649/BCS
   BLK18            656-RD       669/BCS
   BLK19            676-RD       689/BCS
   BLK2             336-RD       349/BCS
   BLK20            696-RD       709/BCS
   BLK21            716-RD       729/BCS
   BLK22            736-RD       749/BCS
   BLK23            756-RD       769/BCS
   BLK24            776-RD       789/BCS
   BLK25            796-RD       809/BCS
   BLK26            816-RD       829/BCS
   BLK27            836-RD       849/BCS
   BLK28            856-RD       869/BCS
   BLK29            876-RD       889/BCS
   BLK3             356-RD       369/BCS
   BLK30            896-RD       909/BCS
   BLK31            916-RD       929/BCS
   BLK32            936-RD       949/BCS
   BLK33            956-RD       969/BCS
   BLK34            976-RD       989/BCS
   BLK35            997-RD      1010/BCS
   BLK36           1018-RD      1032/BCS
   BLK37           1039-RD      1052/BCS
   BLK38           1059-RD      1072/BCS
   BLK39           1079-RD      1092/BCS
   BLK4             376-RD       389/BCS
   BLK40           1099-RD      1112/BCS
   BLK41           1119-RD      1132/BCS
   BLK42           1139-RD      1152/BCS
   BLK43           1159-RD      1172/BCS
   BLK44           1179-RD      1192/BCS
   BLK45           1199-RD      1212/BCS
   BLK46           1219-RD      1232/BCS
   BLK47           1239-RD      1252/BCS
   BLK48           1259-RD      1272/BCS
   BLK49           1279-RD      1292/BCS
   BLK5             396-RD       409/BCS
   BLK50           1299-RD      1312/BCS
   BLK51           1319-RD      1332/BCS
   BLK52           1339-RD      1352/BCS
   BLK53           1359-RD      1372/BCS
   BLK54           1379-RD      1392/BCS
   BLK55           1399-RD      1412/BCS
   BLK56           1419-RD      1432/BCS
   BLK57           1439-RD      1452/BCS
   BLK58           1459-RD      1472/BCS
   BLK59           1479-RD      1492/BCS
   BLK6             416-RD       429/BCS
   BLK60           1499-RD      1512/BCS
   BLK61           1519-RD      1532/BCS
   BLK62           1539-RD      1552/BCS
   BLK63           1559-RD      1572/BCS
   BLK64           1579-RD      1592/BCS
   BLK65           1599-RD      1612/BCS
   BLK66           1619-RD      1632/BCS
   BLK67           1639-RD      1652/BCS
   BLK68           1659-RD      1672/BCS
   BLK69           1679-RD      1693/BCS
   BLK7             436-RD       449/BCS
   BLK70           1701-RD      1716/BCS
   BLK71           1724-RD      1739/BCS
   BLK72           1747-RD      1762/BCS
   BLK73           1770-RD      1785/BCS
   BLK74           1793-RD      1807/BCS
   BLK75           1815-RD      1829/BCS
   BLK76           1837-RD      1851/BCS
   BLK77           1859-RD      1873/BCS
   BLK78           1880-RD      1893/BCS
   BLK79           1900-RD      1913/BCS
   BLK8             456-RD       469/BCS
   BLK80           1920-RD      1933/BCS
   BLK81           1940-RD      1954/BCS
   BLK82           1961-RD      1979/BCS
   BLK83           1986-RD      2005/BCS
   BLK84           2012-RD      2030/BCS
   BLK85           2037-RD      2054/BCS
   BLK86           2061-RD      2072/BCS
   BLK87           2079-RD      2090/BCS
   BLK88           2097-RD      2109/BCS
   BLK89           2116-RD      2129/BCS
   BLK9             476-RD       489/BCS
   BLK90           2136-RD      2149/BCS
   BLK91           2156-RD      2168/BCS
   BLK92           2175-RD      2189/BCS
   BLK93           2196-RD      2211/BCS
   BLK94           2218-RD      2232/BCS
   BLK95           2240-RD      2254/BCS
   BLK96           2261-RD      2275/BCS
   BLK97           2282-RD      2296/BCS
   BLK98           2303-RD      2317/BCS
   BLK99           2324-RD      2338/BCS
   C                 35-EQU
   CALL1             52/XPSD    3127-DATA
   CALL2             53/XPSD    3131-DATA
   CALL3             54/XPSD    3135-DATA
   CALL4             55/XPSD    3139-DATA
   CATALOG            3-EQU        4/EQU
   COUNT1            72/XPSD    3168-DATA
   COUNT2            73/XPSD    3172-DATA
   COUNT3            74/XPSD    3176-DATA
   COUNT4            75/XPSD    3181-DATA
   D                 36-EQU
   DEC               49/XPSD    3114-DATA
   E                 37-EQU
   EXTERN            80/XPSD      81/XPSD      82/XPSD      83/XPSD      84/XPSD      85/XPSD      86/XPSD
        87/XPSD      88/XPSD      89/XPSD      90/XPSD      91/XPSD      92/XPSD      93/XPSD      94/XPSD
        95/XPSD      96/XPSD      97/XPSD      98/XPSD      99/XPSD     100/XPSD     101/XPSD     102/XPSD
       103/XPSD     104/XPSD     105/XPSD     106/XPSD     107/XPSD     108/XPSD     109/XPSD     110/XPSD
       111/XPSD     112/XPSD     113/XPSD     114/XPSD     115/XPSD     116/XPSD     117/XPSD     118/XPSD
       119/XPSD     120/XPSD     121/XPSD     122/XPSD     123/XPSD     124/XPSD     125/XPSD     126/XPSD
       127/XPSD     128/XPSD     129/XPSD     130/XPSD     131/XPSD     132/XPSD     133/XPSD     134/XPSD
       135/XPSD     136/XPSD     137/XPSD     138/XPSD     139/XPSD     140/XPSD     141/XPSD     142/XPSD
       143/XPSD     144/XPSD     145/XPSD     146/XPSD     147/XPSD     148/XPSD     149/XPSD     150/XPSD
       151/XPSD     152/XPSD     153/XPSD     154/XPSD     155/XPSD     156/XPSD     157/XPSD     158/XPSD
       159/XPSD     160/XPSD     161/XPSD     162/XPSD     163/XPSD     164/XPSD     165/XPSD     166/XPSD
       167/XPSD     168/XPSD     169/XPSD     170/XPSD     171/XPSD     172/XPSD     173/XPSD     174/XPSD
       175/XPSD     176/XPSD     177/XPSD     178/XPSD     179/XPSD     180/XPSD     181/XPSD     182/XPSD
       183/XPSD     184/XPSD     185/XPSD     186/XPSD     187/XPSD     188/XPSD     189/XPSD     190/XPSD
       191/XPSD     192/XPSD     193/XPSD     194/XPSD     195/XPSD     196/XPSD     197/XPSD     198/XPSD
       199/XPSD     200/XPSD     201/XPSD     202/XPSD     203/XPSD     204/XPSD     205/XPSD     206/XPSD
       207/XPSD     208/XPSD     209/XPSD     210/XPSD     211/XPSD     212/XPSD     213/XPSD     214/XPSD
       215/XPSD     216/XPSD     217/XPSD     218/XPSD     219/XPSD     220/XPSD     221/XPSD     222/XPSD
       223/XPSD     224/XPSD     225/XPSD     226/XPSD     227/XPSD     228/XPSD     229/XPSD     230/XPSD
       231/XPSD     232/XPSD     233/XPSD     234/XPSD     235/XPSD     236/XPSD     237/XPSD     238/XPSD
       239/XPSD     240/XPSD     241/XPSD     242/XPSD     243/XPSD     244/XPSD     245/XPSD     246/XPSD
       247/XPSD     248/XPSD     249/XPSD     250/XPSD     251/XPSD     252/XPSD     253/XPSD     254/XPSD
       255/XPSD     256/XPSD     257/XPSD     258/XPSD     259/XPSD     260/XPSD     261/XPSD     262/XPSD
       263/XPSD     264/XPSD     265/XPSD     266/XPSD     267/XPSD     268/XPSD     269/XPSD     270/XPSD
       271/XPSD     272/XPSD     273/XPSD     274/XPSD     275/XPSD     276/XPSD     277/XPSD     278/XPSD
       279/XPSD     280/XPSD     281/XPSD     282/XPSD     283/XPSD     284/XPSD     285/XPSD     286/XPSD
       287/XPSD     288/XPSD     289/XPSD     290/XPSD     291/XPSD     292/XPSD     293/XPSD     294/XPSD
       295/XPSD     296/XPSD     297/XPSD     298/XPSD     299/XPSD     300/XPSD     301/XPSD     302/XPSD
       303/XPSD    3193-DATA
   EXTINT          3195/DATA    3249-WAIT
   F                 38-EQU
   FLOAT             48/XPSD    3110-DATA
   INOUT             76/XPSD    3185-DATA
   INT5A           3178/DATA    3241-WAIT
   INT5B           3183/DATA    3243-WAIT
   INT5C           3187/DATA    3245-WAIT
   INT5D           3191/DATA    3247-WAIT
   INT50           3150/DATA    3229-WAIT
   INT51           3154/DATA    3231-WAIT
   INT56           3162/DATA    3233-WAIT
   INT58           3170/DATA    3237-WAIT
   INT59           3174/DATA    3239-WAIT
   IUNASS          3166/DATA    3235-WAIT
   MEMPAR            70/XPSD    3160-DATA
   NONOP             44/XPSD    3094-DATA
   OFLO              47/XPSD    3106-DATA
   PANEL             77/XPSD    3189-DATA
   POWOFF            65/XPSD    3152-DATA
   POWON             64/XPSD    3148-DATA
   PULSE1            66/MTW     3156-DATA
   PULSE2            67/MTW     3157-DATA
   PULSE3            68/MTW     3158-DATA
   PULSE4            69/MTW     3159-DATA
   RESTART         3230/LPSD    3232/LPSD    3234/LPSD    3236/LPSD    3238/LPSD    3240/LPSD    3242/LPSD
      3244/LPSD    3246/LPSD    3248/LPSD    3250/LPSD    3253-DATA
   RETURN           310-BIR     3088/B
   S:PT               4/EQU
   STACK             46/XPSD    3102-DATA
   START            308-LW      3202/B       3204/B       3206/B       3208/B       3210/B       3212/B
      3214/B       3216/B       3218/B       3220/B       3222/B       3224/B       3253/DATA    3256/END
   TIMER             50/XPSD    3118-DATA
   TITLE              4-EQU       39/TITLE
   TRAPUN          3124/DATA    3215-WAIT
   TRAP4A          3137/DATA    3221-WAIT
   TRAP4B          3141/DATA    3223-WAIT
   TRAP40          3096/DATA    3201-WAIT
   TRAP41          3100/DATA    3203-WAIT
   TRAP42          3104/DATA    3205-WAIT
   TRAP43          3108/DATA    3207-WAIT
   TRAP44          3112/DATA    3209-WAIT
   TRAP45          3116/DATA    3211-WAIT
   TRAP46          3120/DATA    3213-WAIT
   TRAP48          3129/DATA    3217-WAIT
   TRAP49          3133/DATA    3219-WAIT
   TUNASS            51/XPSD      56/XPSD      57/XPSD      58/XPSD      59/XPSD    3122-DATA
   T1              1945/STW     1946/LW      1966/STW     1968/STW     1970/LW      1992/STW     1994/STW
      1996/LW      2018/STW     2020/STW     2022/LW      2042/STW     2044/STW     2046/LW      3255-DATA
   UNASIN            71/XPSD      78/XPSD      79/XPSD    3164-DATA
   UNIMP             45/XPSD    3098-DATA
   VERSION            2-EQU        4/EQU
   W1              2897/LPSD    2900-GEN
   W2              2922/LPSD    2925-GEN
   W3              2946/LPSD    2949-GEN
   W4              2971/LPSD    2974-GEN
   W5              2995/LPSD    2998-GEN
   W6              3020/LPSD    3023-GEN
   W7              3044/LPSD    3047-GEN
   W8              3069/LPSD    3072-GEN
