Recent changes to ARMulator and known deficiencies
==================================================

Known Deficiencies
------------------
1) Phase based emulation will never be supported. It has been replaced by a
more powerful cycle based emulation which predicts all signal changes in the
current cycle at the beginning of a cycle. Please contact ARM Ltd if you
require full details of this system.

2) The address bus during an internal cycle is always 0. It should predict
the address of the next cycle.

3) Speculatively executing co-processor models have no way of knowing when an
instruction entered the pipeline (and hence when execution could have begun).
The function ARMul_CoProLoaded is not implemented, its effect can be
simulated be calling co-processor models from the memory model, in the
routines ARMul_LoadInstrS and ARMul_LoadInstrN.

4) Unused instruction formats have a different effect on the processor state
than on real ARM processors. 

5) Interrupts do not have a one cycle syncronisation delay that real hardware
incorporates. Thus an interrupt raised during the last cycle of an
instruction will be serviced by ARMulator before the next instruction, and
after the next instruction on real hardware.


Changes to ARMulator II version (Release 1.6.1)
-----------------------------------------------

Setting a breakpoint causes the breakpointed instruction to be written to a
completely illegal pattern (to solve the problem that a breakpoint on a floating
point instruction may not be hit because the instruction is read ahead by the
fpe).


Changes to ARMulator II version 1.4 (Release 1.6)
-------------------------------------------------
Improvement: ARMul_SelectProcessor now supports many more processor types.

Addition: When emulating appropriate processors, ARM7M 64-bit
multiplies are supported. In addition, ARM7M timings for the 32-bit
MUL instruction are given.

Addition: The clearAborts flag in ARMul_State has been added to
allow an increase in the efficiency of memory models. (The supplied
models do not yet take advantage of this.)

Addition: The ModeChange upcall pointer has been added so that
claimants of the upcall can be told when the processor has changed
mode.

Improvement: Demon 1.2 emulation has been installed in armos.c . This
supports the new FPE, and re-maps the layout of the various stacks.


Changes to ARMulator II version 1.3 (Release 1.5)
-------------------------------------------------
Bugfix: The co-processor register write routines (ARMul_CPWrites) now take a
pointer to the data value, to allow multiword register accesses.

Addition: Many unused ARM instructions (i.e. neither defined nor undefined)
have the same effect as current ARM implementations.

Improvement: The virtual memory model has been rewritten. At the expense of
64 Kbytes of memory the speed of this model has been improved, to within 10%
of the fast memory model.

Improvement: The ARMulator core has been improved for greater speed.


Changes to ARMulator II version 1.2 (Release 1.4)
-------------------------------------------------
Addition: The ARMul_State structure has fields for co-processor handlers and
their data, to allow different handlers to be used for different
instantiations of ARMulator.  See the ARMulator manual for full details. 

Addition: The protocol used to communicate with co-processor handlers has
been improved, and more closely models the real silicon.  See the ARMulator
manual for full details. 

Addition: The routines ARMul_MemoryExit, ARMul_OSExit and ARMul_CPExits are
called from ARMulator, allowing models to de-allocate memory. 

Improvement: ARMulator now breaks co-processor busy waits when an IRQ, FIQ or
Reset is encountered. 


Changes to ARMulator II version 1.1 (Release 1.3)
-------------------------------------------------
Bug Fix: Exceptions in the C library are now properly handled by the model in
armos.c.

Bug Fix: ARMulator no longer returns incorrect error messages in response to
some RDI messages.

Addition: Several functions have been added to assist accessing ARMulator's
internal state.  See the ARMulator manual for full details. 

Addition: The ARMul_State structure has a field CommandLine, which hold the
command line last set by ARMsd. 

Improvement: The file ARMfpe.o(bj) contains the Floating Point Emulator
(FPE), which the function ARMul_OSInit installs in ARMulator's memory between
locations 0x2000 and 0x8000, and redirects the undefined instruction vector
to enter the FPE.

Improvement: ARMulator now dynamically models the Prog32 pin (32 bit program
space), the Data32 pin (32 bit data space) and the LateAbt pin (Late abort). 
The three memory models provided also dynamically model the BigEnd pin
(endianess).  These pins may be altered from a program by writing to register
1 of co-processor 15, using an instruction like 

                MCR p15, 0, Rn, c1, c1 

where Rn is an ARM register.  Bit 4 in this register represents the Prog32
pin, bit 5 the Data32 pin, bit 6 the LateAbt pin, and bit 7 the BigEnd pin. 
Other functions of co-processor 15 are described in armcopro.c


ARMulator II version 1.0 (Release 1.0)
--------------------------------------
