To facilitate board-level simulation of Xilinx designs in Quicksim, the
following scripts have been written:

   add_xilinx_func.do :  AMPLE script to be run in DVE to add parameters
                         for Xilinx functional simulation into board-level
                          viewpoints
   add_xilinx_tim.do  :  AMPLE script to be run in DVE to add parameters
                         for Xilinx timing simulation into board-level
                         viewpoints
   regschem           :  Registers a functional or timing schematic model
                         to a component interface

   getreg.nawk        :  Subscript called by REGSCHEM to extract registry
                         information from a component interface, requires
                         NAWK

   unregschem         :  Unregisters a schematic model from a component
                         interface

The two AMPLE scripts may be saved in your design directory.  The regschem
and getreg.nawk scripts need to be placed in an executable directory
referenced by your $path variable.

To use the two AMPLE scripts, open in DVE the viewpoint to which you want
to add simulation information, then type one of the following:

   dofile add_xilinx_func.do  (functional simulation)
   dofile add_xilinx_tim.do   (timing simulation)

To use the registration script, determine both the schematic model and the
component to which you want to register the model, then type:

   regschem -f component model/schematic  (functional model)
   regschem -t component model/schematic  (timing model)

For example, say we have an XBLOX design called "filter" on which we had
run Fncsim8:

   fncsim8 filter -o

This generates a simulation model called simdir/filter/schematic that we
wish to register with the original component.  This would mean we would
run:

   regschem -f filter simdir/filter/schematic

A list of CIB commands issued by REGSCHEM may be found in the file cib.cmd,
while a description of the modified component interface may be found in the
file cib_view.log.

For more information on board-level simulation in Quicksim, see Solution
619 in the Xilinx Solutions Database:

   http://www.xilinx.com/techdocs/619.htm

Regards,
Xilinx Technical and Applications Support
