Using the advanced process technology discussed earlier, Xilinx will provide a 5x increase in system performance over the next 5 years.

This graph uses the performance metric of

1/(Tsetup + Tclock-to-out)

which provides a good measure of chip-to-chip performance.

Different vendors measure performance using different metrics, usually trying to make their FPGAs look better than everyone else's. What is probably more important than the absolute value of the performance shown in the graph is the improvement that we expect to see from year to year.

The large performance increase shown in 1997 results from the Denali architecture. This will be introduced in late 97 and is capable of true 100MHz chip-to-chip performance.