XC3000
Application Notes
Data Book
XCELL Articles
to view the
PDF files below.
Application Notes
Title
Size
Loadable Binary Counters
41 kB
Register-Based FIFO
56 kB
Boundary-Scan Emulator for XC3000
82 kB
Harmonic Frequency Synthesizer and FSK Modulator
25 kB
LCA Speed Estimation: Asking the Right Question
8 kB
Quadrature Phase Detector
20 kB
Ultra-Fast Synchronous Counters
36 kB
Adders, Subtracters and Accumulators in XC3000
65 kB
Multiplexers and Barrel Shifters in XC3000/XC3100
38 kB
Implementing State Machines in LCA Devices
31 kB
Frequency/Phase Comparator for Phase-Locked Loops
14 kB
Serial Code Conversion Between BCD and Binary
18 kB
Megabit FIFO in Two Chips: One LCA Device and One DRAM
23 kB
Fully Compliant PCI Interface in XC3164A-2 FPGA
171 kB
C-Cube CL550 and Xilinx XC3020A ISA-Based Motion-JPEG Codec
107 kB
Configuring Mixed FPGA Daisy Chains
24 kB
Configuring FPGAs Over a Processor Bus
541 kB
Pulse-Width Modulation in Xilinx
145 kB
Design Migration from XC2000/XC3000 to XC5200
125 kB
Data Book
Title
Size
XC3000 Series Field Programmable Gate Arrays
655 kB
XC3000A Field Programmable Gate Arrays
59 kB
XC3000L Field Programmable Gate Arrays
58 kB
XC3100A Field Programmable Gate Arrays
61 kB
XC3100L Field Programmable Gate Arrays
56 kB
Additional XC3000 Data
108 kB
3.3 V and Mixed Voltage Compatible Products
v2.0, 3/97
31 kB
XCELL Articles
Title
Issue
Demultiplexing 200 MHz Data Streams
Q1 '97
Ten-Digit Fully Synchronous BCD Counter Runs at 87 MHz
Q2 '96
Additional Settings for XC3000 and XC5200 in Synopsys
Q1 '96
Manchester Decoder in 3 CLBs
Q2 '95
Retargeting Designs in Mentor Design Architect
Q1 '96
Turning off the Internal Oscillator
Q3 '95
FPGAs Control ATM Connections to French Telecom Network
Q4 '95