
Document List
How
to Order Hard Copies
Descriptions
of Documents
Our PCI library, and the means in which to order documentation, is constantly expanding. Refer to this page whenever you need the latest status on Xilinx PCI literature.
Last updated 12/10/96
| PCI Documentation | Status | Date | PCI Packet |
|---|---|---|---|
| Using Programmable Logic in PCI Designs | 1/96 | Included | |
| XC3100A Component Electrical Checklist | Included | ||
| XC4000E Component Electrical Checklist | Included | ||
| XC73108 Component Electrical Checklist | Included | ||
| XC73144 Component Electrical Checklist | Included | ||
| LogiCORE Press Release |
7/29/96 | Included | |
| LogiCORE PCI Interface Master & Slave Datasheet |
![]() |
10/96 | Included |
| LogiCORE PCI Master & Slave Interface User Guide | ![]() |
8/2/96 | Separate |
| LogiCORE PCI Protocol Compliance Checklist |
![]() |
7/7/96 | Separate |
| FPGA Compiler Design Methodology Using Drop-in LogiCore Elements |
3/30/96 | Separate | |
| XC3164A PCI Application Note |
1/95 | Included | |
| Implementing FIFOs in XC4000 Series RAM |
Revised | 7/7/96 | Included |
| Article Reprint: High-Speed State Machine Design | 7/95 | Included |
Ordering the PCI Packet
The easiest and most complete way to obtain a hard copy of all
the Xilinx PCI documents is to order our PCI Packet, since not all
documentation is available in electronic form. The packet also includes
the design files of our free reference designs on diskette. To order a
copy, send E-mail to literature@xilinx.com
and specifically request the PCI Packet. Include your name, company name,
and postal address. One will be mailed to you via regular postal mail.
Please allow up to two weeks for delivery, possibly more for international
locations. (Note: The LogiCore PCI User Guide must be ordered separately.
See below.)
Ordering the LogiCORE PCI Interface User
Guide
The LogiCORE PCI Interface User Guide is currently not part of our
PCI Packet and must be ordered separately. To order a copy, send E-mail
to literature@xilinx.com and
specifically request the PCI LogiCORE User Guide. Include your name, company
name, and postal address. One will be mailed to you via regular postal
mail. Please allow up to two weeks for delivery, possibly more for international
locations.
X-Note 5A: Using Programmable Logic in PCI Designs
This X-Note has been completely revised. It focuses primarily on how
PCI compliance relates to programmable logic and how many claims of PCI-compliant
PLDs are incomplete and potentially misleading. Know the full story before
you commit to a particular device or reference design. Also included is
a guide for selecting the most suitable device for your design.
Component Electrical Checklists
The component electrical checklist is a list of electrical parameters
specified by the PCI Special Interest Group
that integrated circuits must adhere to in order to be electrically compliant
to the PCI specification . Completed checklists
are available for the Xilinx programmable logic families listed in the
summary table above.
Xilinx LogiCORE(TM) Solutions
Xilinx LogiCORE (tm)
Solutions are logic modules for highly integrated system building blocks.
The first LogiCORE release is the PCI
Interface Module , the programmable logic industry's most successful, fully-tested
and pre-implemented PCI Interface module.
FPGA Compiler Design Methodology Using LogiCORE Modules
This Application Note addresses the design flow used to insert a PCI
Target LogiCORE into a VHDL design that is processed using Synopsis' FPGA
Compiler. The flow using Design Compiler is similar. This is currently
not part of the PCI Packet, but is downloadable directly from the table
above.
Application Note: Fully Compliant PCI Interface in an XC3164A FPGA
A PCI Target interface implemented in a Xilinx XC3100A-2
FPGA device. VIEWlogic schematics and Verilog source code are available.
The Verilog source has been optimized for use with Exemplar Logic's CORE
logic synthesis software.
Application Note: Implementing FIFOs in XC4000E RAM
This Application Note demonstrates how to use the new RAM modes in
the XC4000E logic block. A
PCI Write FIFO is implemented in several different ways, using various
combinations of asynchronous and synchronous, level-sensitive and edge-triggered,
single-port and dual-port RAM.
Article Reprint: High-Speed State Machine Design
This article focuses on a methodology for developing fast state machines
that achieve both function and performance in FPGAs. PCI state machines
are analyzed as an example.
PCI Packet
The PCI Packet contains a hard copy of all of the Xilinx PCI literature
(except for the LogiCore PCI Interface User Guide, which must be ordered
separately) plus a diskette of the design files of our free PCI reference
designs. Click here to see how to order one.
LogiCore PCI Interface User Guide
The User Guide gives you a complete description of the LogiCore PCI
Interface and how it is implemented in the Xilinx XC4000E FPGA family.
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