Xilinx Application Briefs are technical papers describing the advantages of Xilinx products, especially versus competing solutions.
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XBRF001
XC4000E Select-RAM: Flexibility with Speed
The Xilinx XC4000 Series Select-RAM offers the best size flexiblility and at the same time offers high speed operation with very little waste.
XBRF002
XC4000E Low Power Consumption: At High Speeds
The Xilinx XC4000E family offers low power at high speed operation, giving the customer reliable operation to very high system speeds.
XBRF003
XC4000E Select-RAM: Maximum Configurability
Detailed analysis shows that Select-RAM is the most silicon efficient implementation for FPGA memory. Due to the Dual-Port RAM capability it also offers maximum bandwidth for most applications.
XBRF004 PLDs,
Pins, and PCBs: The Importance of Pin-Locking and Footprint Compatibility
The ability to maintain fixed I/O pin locations during PLD design and to migrate designs between footprint-compatible PLDs of varying densities helps isolate printed circuit board design from logic changes within the PLD device, thereby accelerating time-to-market and accommodating design changes throughout a product’s life.
XBRF005
XC4000EX Routing: A Comparison with
XC4000E and ORCA
The new XC4000EX family includes large amounts of new routing resources, necessary to support today's larger designs. These resources are detailed and compared with the XC4000E, and with ORCA devices from Lucent Technologies (formerly AT&T).
XBRF006
PLL Design Techniques and Usage in FPGA Design
This paper examines some general concepts concerning Phase Locked Loop (PLL) usage and their application in programmable logic devices. A critique of a newly-announced PLL implementation for FPGAs also is included.
XBRF007
XC4000-Series FPGAs: The Best Choice for
Delivering Logic Cores
Reusable logic cores provide an efficient means of embedding common logic functions in high-density FPGA designs. The rich feature set of the XC4000-Series FPGA devices makes them the ideal choice for core-based system design.
XBRF009
XC9500 Pin Locking Capability and Benchmarks
This application brief presents benchmarks that demonstrate the superior pin-locking capability of the Xilinx XC9500 CPLDs. These benchmarks are based on typical applications and demonstrate the benefits of a highly routable switch matrix and wide function block fan-in when iterating pinlocked designs. The Xilinx results are compared to other vendors’ CPLDs using their latest production fitters, proving that the Xilinx XC9500 family is the industry’s best pin-locking CPLD.
XBRF010
FastFLASH: A New Electrically Erasable CPLD
Technology
The Xilinx FastFLASH technology, used in the XC9500 family, provides key advantages in reliability, density, and performance. This overview describes the FastFLASH process technology and compares it with EEPROM technology.
XBRF011
An Alternative Capacity Metric for LUT-Based
FPGAs 
As an alternative to "gate counting", the capacity of lookup-table-based FPGAs can be measured more directly and objectively by examining the number of available "logic cells".
