Partner Overview Areas of Technical Expertise Contact Logic Innovations Inc.

Partner Profile

Partner Overview

Logic Innovations, Inc. (LII) has been providing FPGA and ASIC models and hardware and software design services since 1986. LII provides services in the following areas:

• Turnkey hardware and software development
• ASIC prototyping using multiple Xilinx FPGAs
• Small scale manufacturing

• Set-top boxes for cable and satellite broadcast systems
• High speed digital, analog and integrated circuit design
• Production test systems for cable and satellite equipment
• Asynchronous Transfer Mode (ATM) logic designs in Xilinx FPGAs
• Embedded systems and real time operating system software design

Similarly, LII has developed communications products such as cable modems that use the Asynchronous Transfer Mode (ATM) communications protocol. The ATM Building Blocks were designed as HDL for implementation in FPGAs to accommodate design changes and multiple product configurations. LII has now released these tried-and-proven PCI Bus and ATM HDL models for use by system designers who demand fast time-to-market, design flexibility and the ability to customize. These products are available as source code in VHDL or Verilog format, or object code in device-specific netlist format. Demand for the IP Products is rapidly increasing commensurate with gate capacities in ASICs and FPGAs, as designers seek to reduce development time and cost by using drop-in, standard logic modules.

Areas of Technical Expertise

The following table of products demonstrates Logic InnovationsŐ areas of technical expertise. Xilinx and Logic Innovations are in the process of evaluating these to determine which are suitable as AllianceCORE products. If you have a need for a specific product then contact Logic Innovations for information or availability.

Product	Functional Description	Gates
Standard Bus Interfaces
PCI Bus 32-bit Master/Target	Rev. 2.1 interface in Verilog or VHDL. Supports full speed burst memory transfers (up to 132 MBps) with a simplified, synchronous local bus interface. 16-word by 32-bit transfer buffer of size 2K to 4K; address and data parity generation and checking, and PCI interrupt support. Includes a complete HDL test bench to verify compliance.	9,000
Communications and Networking
Transmission Convergence Cell Inlet Model	Supports up to 50 Mbps serial input bit transfer rate and serial to parallel conversion; performs cell delineation which generates sequenced ATM cells to send to the internal ATM cell FIFO; HEC check and multi-cell receive FIFOing; UTOPIA Level 1/2 compatible.	4,000
Transmission Convergence Cell Outlet Model	Supports up to 50 Mbps serial output bit transfer rates, and parallel to serial conversion; provides HEC field generation and multi-cell transmit FIFOing; UTOPIA Level 1/2 compatible.	13,000
UTOPIA Level 2 Interface Building Block	UTOPIA Level 2, v1.0 interface to parallel send/receive cell FIFOs; provides buffering for 3 ATM cells in receive and 3 in transmit direction; generic parallel interface for easy access to internal ATM cell FIFOs. Supports variable ATM cell length of up to 64 bytes, and both 8 and 16 bit data paths.	4,000
ATM Broadband Cell Delineation Building Block	Supports 1.544 Mbit/s to 155.53 Mbit/s. UTOPIA Level 2 ATM layer interface, a serial and parallel physical layer interface, and a microprocessor interface for configuration and monitoring functions. It includes multiple cell input and output FIFOing, and supports HEC generation. Provides scrambler logic for cell transmit and de-scramble logic for cell receive, cell rate decoupling and ATM cell delineation.	4,000

Contact Logic Innovations, Inc.

Logic Innovations, Inc
6205 Lusk Boulevard
San Diego, CA 92121 USA
Phone: 619-455-7200
Fax: 619-455-7273
E-mail: info@logici.com
URL: www.logici.com

Use the following form to contact Logic Innovations and request additional information. When complete, press SUBMIT to send your message. Name, Company, Phone, and Email fields are required.