CORE Generator
Tool for PCI
Introduction
Try the demo version
Press release
 Product description |
Design flow application note
Questions & answers
LogiCORE Lounges registration
CORE Solutions for FPGAs |
to view the
PDF files.
This innovative methodology for using and distributing FPGA cores allows you to customize and integrate Xilinx' LogiCORE PCI products (firm cores with predictable timing) using general purpose VHDL, Verilog or schematic entry tools. Because the CORE generator is executable on Xilinx home page you will always have access to the latest versions of the LogiCORE PCI Interfaces.
After configuration of the core, the resulting design files are downloaded
and instantiated in your HDL or schematic design. Functional simulation
can be completed with
the accompanying HDL simulation model together with the rest of the design.
During synthesis, the core is not
touched by the synthesizer, because the generated core is already optimized
and implemented to ensure timing. The core netlist is then merged with
the post-synthesis custom netlist for placement and routing. The complete design flow is described in the application note
Using
pre-implemented LogiCORE PCI Interfaces with VHDL and Verilog. For
more information on the CORE Generator, see the
Product Description.
The LogiCORE generator is available in our PCI Master Lounge for all LogiCORE PCI Master customers with a valid support contract. If you are a current LogiCORE PCI Master customer, register today to get access to the lounges. If you have not purchased a LogiCORE PCI product yet, you can run our CORE Generator demo version to evaluate available features and options.
The CORE Generator adds to Xilinx complete solution for PCI that includes:
For more infomation on Xilinx PCI, visit our PCI Solution pages.
The Xilinx PCI Core Generator requires a Java-enabled Web browser to run, such as Netscape Navigator version 3.0 or later.