PCI Master and Slave Interfaces

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Product Description Introduction Features List Technical Support Ordering information Questions and Answers LogiCORE VIP Lounges Overview and Registration Instructions PCI Master Lounge Password Required PCI Slave Lounge Password Required

Product Documentation Product Description - datasheet User's Guide - complete technical description. LogiCORE PCI 1.0.0 and 1.1.0 comparison PCI Protocol Compliance Check List HDL design flow for LogiCORE PCI Additional PCI Information PCI Solutions Page CORE Generator for PCI

Introduction

The LogiCORE PCI products are pre-implemented and fully verified PCI Master (Initiator/Target) and PCI Slave (Target-only) Interfaces for Xilinx FPGAs. Because we defined the implementation of all critical paths, timing within the module is predictable. As a result, we can fully verify the module to the PCI Spec V2.1 before we released the core. You can focus your time and resources on the system design and your unique back-end functions, which can cut development time by several months.

Features

• Fully 2.1 PCI compliant 32 bit, 33MHz PCI Interface
• Pre-implemented for predictable timing
• PCI Compliant SRAM based FPGAs
• Fully verified design in SW and silicon
• Configurable on-chip FIFO can be included
• Programmable single-chip solution with customizable back-end
• Automatic conversion to HardWire for cost reduction

For more information, see Why Xilinx for PCI? and the LogiCORE PCI Product Description.

Technical Support

We have dedicated PCI specialists on our hotline that can answers questions via e-mail or phone. Xilinx provides technical support for the LogiCORE product when used as described in the User's Guide or supporting Application Notes. Xilinx cannot guarantee timing, functionality, or support of the product if implemented in devices not listed in the data sheet, or customized beyond that referenced in the product documentation.

Ordering Information

Please contact your local Xilinx Sales Representative for price and availability.

Part numbers:
LC-DI-PCIM-C, LogiCORE PCI Master (Initiator and Target) Interface
LC-DI-PCIS-C, LogiCORE PCI Slave (Target-only) Interface

Questions and Answers

Q: What do I receive when I purchase the LogiCore PCI products?

A: The LogiCore PCI product comes with a CD including all design files, required constraint files, a simulation test bench (not Phoenix Technologies), and on-line documentation. The documentation includes the following:

• LogiCORE PCI V1.1.0 User Guide
• LogiCORE PCI Protocol Compliance Checklist
• Comparison between LogiCORE PCI V1.0.0 and V1.1.0

We've also included a recommended PCI Reference Book (PCI Systems Architecture by T Shanley and D Anderson). The product comes with a support and maintenance contract of one year.

Q: In what format are the design files and the test bench?

A: Currently all design files are for Viewlogic Powerview on work station and Viewlogic Workview Office on PC (Win 3.1 and Win95).

Q: How is LogiCore PCI used in an HDL design flow?

A: The current LogiCore PCI Interface can be instantiated in an VHDL or Verilog design and simulated by generating an HDL model from the XNF netlist. The methodology is described in the application note Using pre-implemented PCI LogiCORE Interfaces with VHDL and Verilog. Please note that Viewlogic is currently still required to configure and customize the PCI Interface. Further improved HDL support is under development and will be announced at a later date.

Q: How do I purchase the LogiCore PCI products?

A: Contact your local Xilinx sales person. Sign the LogiCore license agreement included in the LogiCore PCI Product Description. Send the agreement with the purchase order to Xilinx.

Q: How is the LogiCore products licensed?

A: The LogiCore products is typically licensed for usage in Xilinx FPGAs or HardWire. Contact you local Xilinx representative for more details on the license agreement.

Q: What other information is available about Xilinx PCI Solution

A: Please visit our PCI Solutions Page.