XABEL-CPLD is the new Xilinx development system designed for PAL and CPLD users. With this completely self contained system, PC-based customers can quickly and easily integrate their logic into Xilinx CPLDs.
The XABEL-CPLD 6.1 evaluation CD offers a truly accurate method for evaluating the speed, density, and pin-locking features of the industry's best ISP architecture - the XC9500 FastFLASH(tm) CPLDs.
Using the industry standard ABEL 6 hardware description language, XABEL-CPLD will allow you to easily create designs for both the XC7000 and XC9500 families. With XABEL-CPLD, you can now target your designs to either family without modification.
Simply enter your design and the software on the CD does the rest! From
simulation to timing verification you'll see exactly how your logic will
perform in-system.
XABEL-CPLD 6.1 Features
· Industry-Standard Hardware Description Language
· Hierarchical Design Entry
· JEDEC File Conversion
· Complete Design Verification
· On-Line Tutorial and Help System
· Advanced XACTstep v6.1 XC7000 and XC9500 fitters
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