CPLD configurations provide solutions for Xilinx CPLD families including the XC9500
   and XC7300.

Base configurations provide push button design flows and support FPGA and CPLD
    designs up to 5,000 logic gates.

Standard configurations combine push button flows with powerful auto-interactive
    tools. These tools give designers more influence and control over implementation
    while maintaining the benefits of design automation. Standard configurations support designs
    up to 30,000 logic gates.

High Density Configurations provide state of the art algorithms necessary for the most
    complex programmable logic designs. These configurations include support for all
    Xilinx programmable logic devices up to the XC4085EX.

Configuration Table

	CPLD	Base	Standard	High Density*
XC7300	All	All	All	All
XC9500	All	All	All	All
XC3000A XC3100A XC3000L		XC3X20A/L XC3X30A/L XC3X42A/L	All	All
XC4000E XC4000L		XC4003E	All	All
XC4000EX			XC4028EX	XC4028EX XC4036EX XC4044EX XC4052XL XC4062XL XC4085XL
XC5200 XC5200L*		XC5202 XC5204	All	All
*Contact your Xilinx Sales Representative for availability.