Harmonix

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PARTHENON

Harmonix Corporation
500 West Cummings Park, Suite 6900
Woburn, MA 01801 U.S.A.
Tel: 1-617-935-8335
Fax: 1-617-935-8530

PARTHENON provides a complete system design solution for IC, ASIC, and FPGA embedded systems. PARTHENON's unique, architectural-level behavioral synthesis allows the designer to focus on architectural design issues, leaving the lower-level details to the tool.

PARTHENON uses the Structured Function description Language (SFL), modeled after the C language and containing extensions for additional hardware concepts such as pipelining and parallelism.

Product Highlights

• Architectural-level behavioral synthesis using a language that mirrors the C language
• A complete set of tools to simulate, synthesize and optimize
• An object-oriented library system, allowing intelligent management
• Technology independent SFL designs are highly portable
• Operates on Sun and IBM PC-compatible platforms

Xilinx-Specific Highlights

• Support for Xilinx XC3000, XC4000, and XC7000 devices
• Outputs EDIF and XNF netlists
• Rapid Prototyping Board (PCI interface) featuring Xilinx components

Design Flow

1. System design is done using SFL.
2. Designs can be simulated using PARTHENON's internal simulator, VICE.
3. Synthesis and optimization steps can then occur resulting in a EDIF or XNF netlist.
4. Xilinx's XACTstep suite of tools can then be applied to the resulting netlist to map designs to Xilinx devices, such as those that appear on a Rapid Prototyping Board.

© 1996 Xilinx, Inc. All rights reserved
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