
ISHIZUE
ISHIZUE offers a highly integrated, easy-to-use framework system that assists design engineers in meeting the challenge of change, both efficiently and economically. The ISHIZUE framework system consists of a schematic capture tool, wave form editor, Verilog simulator, and retargeter in a highly integrated environment. Specialized functions effectively streamline FPGA and ASIC design requirements.
A design can be expressed in a variety of methods: state-machine description, block diagram description, Verilog-HDL description and schematic capture. An XNF netlist can be entered directly into the ISHIZUE system and the design can be simulated immediately at the architecture level. Additional functions transform the drawings of ASIC prototyping into a form which can be readily and efficiently implemented in the targeted Xilinx FPGA architecture.
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