============================================================================== List of contents of Xilinx Anonymous FTP site. File created on Thu Mar 13 22:30:03 PST 1997 ==============================================================================
Applications Relating to Third Party interfaces ============================================================================= Filename Size File Description ============================================================================= xsi_veri.tar 2974KB Verilog design examples for "HDL Synthesis Design Guide for FPGAs". Uncompress and tar -xf to extract. vstbsim.zip 195KB Board-level simulation with OrCAD VST v1.20 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
FPGA Applications Involving Arithmetic Functions ============================================================================= Filename Size File Description ============================================================================= divide4k.zip 83KB 16 x 16 Divide function in 4000 series LCA Implemented with FutureNet/Silos add16.zip 43KB 16-Bit Conditional Sum Adder Xilinx Data Book, "Conditional Sum Adder ..." a16bit.zip 50KB 16-Bit Adder with Carry Lookahead Xilinx Data Book, "Adders and Comparators" Implemented in Dash-LCA a16jet.exe 404KB Self-extracting archive. Contains HP Laser Jet files to print out schematics for the Adder with Carry Lookahead. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
FPGA Applications involving Digital Signal Processing ============================================================================= Filename Size File Description ============================================================================= fft.zip 12 kB This is an example VHDL design of a Fast Fourier Transform for a Digital Processing System. Please refer to the enclosed readme.txt file for further details. xamfir.zip 832 kB Word .DOC files for FIR filter application dspdev.ppt 1083 kB Xilinx Applications DSP Presentation fir_filt.zip 308 kB Viewlogic files for "16-tap, 8-bit FIR Filter" application note For All Platforms Uploaded: 12-02-96 xdsp.tar 7653 kB DSP Toolbox library. Created for use with Mentor A.4 or B.x For All Unix Uploaded: 03-10-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
FPGA Applications involving FIFO (First-In First-Out) Memory ============================================================================= Filename Size File Description ============================================================================= 4kefifo.exe 169KB Design files for XC4000E FIFOs App. Note advfdemo.zip 59KB LCA, BIT, MCS, RPT Files for ADVFIFO advfifo.zip 100KB Advanced Megabit x N FIFO Xilinx DataBook, "Megabit FIFO in 2 Chips..." mbitfifo.zip 99KB Megabit x N FIFO Xilinx DataBook, "Megabit FIFO in 2 Chips..." mbitjet.exe 993KB Self-extracting archive. Contains HP Laser Jet files to print out schematics for the Megabit FIFO. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Miscellaneous Programmable Logic Applications ============================================================================= Filename Size File Description ============================================================================= rs_232.zip 213KB Design files to accompany the application note: RS-232 Based Communications with Xilinx FPGAs. Contains Viewlogic schematics in Pre-Unified Libraries, post-script files. pc_isa.zip 50KB files to accompany "Configuring FPGAs over a Processor Bus" application note bcdcnt.zip 59KB ViewLogic Schematics for "Ten Digit Synchronous BCD Counter", targeted for 3142a psmfiles.exe 44KB Viewlogic schematic files for "Dynamic Micro- controller in an XC4000 FPGA" App note. counter.pld 1KB Counter file mentioned on p.1-4 of XEPLD Design Guide, April 1994 hd16bitb.zip 9KB High speed 16-bit counter (9 CLBs) hd16bit.zip 17KB High-density 16-bit counter and accumulator hard macros (8 CLBs each) pwm.zip 8KB Viewlogic design files for "Pulse Width Modulation in Xilinx Programmable Logic" application note For All Platforms Uploaded on Mon Dec 2 13:41:22 PST 1996 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Applications Involving PCI ============================================================================= Filename Size File Description ============================================================================= rev1e.zip 503KB Viewlogic version and Verilog source code for XC3164 designs in app note, "Designing Flexible PCI Interfaces with Xilinx EPLDs." pci_abel.zip 3KB ABEL source code for XC73108 and XC7354 designs in application note "Designing Flexible PCI Interfaces w/ Xilinx EPLD's" pci_v.zip 16KB Verilog/HDL source code for XC3164 designs in application not "Fully Compliant PCI Interface in XC3164A-2" pci_vhdl.zip 3KB VHDL source code for XC73144 Target Interface design in application note "Designing Flexible PCI Interfaces w/ Xilinx EPLD's" 7300ckl.zip 8KB XC7300-10 PCI Component Electrical Checklist (Word 6.0) 3100ackl.zip 3KB XC3100A-2 PCI Component Electrical Checklist (Word 6.0) pciapp.zip 25KB Notes on PCI applications ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PCMCIA Application files ============================================================================= Filename Size File Description ============================================================================= pcmcia.zip 160KB Sample PCMCIA modem card design. Not simulated or implememted. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Plug and Play Application Files ============================================================================= Filename Size File Description ============================================================================= mnp_upd.exe 25KB Updated schematics for version 0.90 of pnp_v90.exe, Plug and Play design. pnp_v090.exe 239KB Plug and Play ISA interface using the Xilinx XC4003/5 FPGA. Application Note Version: 0.90. Design Last Updated: 19-MAY-95 pnpabel.zip 6KB Plug and Play ABEL files ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Application design files for XAPP Application Notes See ../../../../apps/xapp.htm for more information. ============================================================================= Filename Size File Description ============================================================================= xapp007o.zip 27KB Boundary Scan Emulator for XC3000 v2.03, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp007v.zip 33KB Boundary Scan Emulator for XC3000 v2.03, Implemented in Viewdraw-LCA Unified Libraries xapp014o.zip 70KB Ultra-Fast Synchronous Counters v1.02, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp014v.zip 61KB Ultra-Fast Synchronous Counters V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp044o.zip 39KB High-Performance RAM based FIFO V.1.00, Implemented in Orcad 386+ V1.10 xapp002v.zip 197KB Loadable Up/Down Counters, 8 to 24 bits long V.2.0.1, Implemented in Viewdraw-LCA Unified Libraries xapp050o.zip 417KB Crossbar Switch in XC4000 V.1.00, Implemented in Orcad 386+ V1.10 xapp050v.zip 362KB Crossbar Switch in XC4000 V.1.00, Implemented in Viewdraw-LCA Unified Libraries xapp001o.zip 100KB 60 MHz Counters, 8 to 24 bits long V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp005o.zip 68KB Register-Based FIFO for XC3000 V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp005v.zip 87KB Register-Based FIFO for XC3000 V.2.0.1, Implemented in Viewdraw-LCA Unified Libraries xapp009o.zip 26KB Frequency Synthesizer, FSK Modulator V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp021v.zip 107KB 150 MHz Dual-Prescaler Presettable Counters for XC3000. V.2.01, Implemented in Viewdraw-LCA Unified Libraries xapp023o.zip 64KB Accelerating Loadable Counters in XC4000 V.1.01, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp003o.zip 311KB Synchronous Presettable Up and Down Counters, 8, 12, and 16 bits long V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp004o.zip 225KB Loadable Binary Counters, 16, 32 bits long V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp009v.zip 31KB Frequency Synthesizer, FSK Modulator V.2.0.1, Implemented in Viewdraw-LCA Unified Libraries xapp021o.zip 90KB 150 MHz Dual-Prescaler Presettable Counters for XC3000. V.2.01, Implemented in OrCAD 386+ V1.10. Unified Libraries xapp022o.zip 12KB Adders, Subtractors, and Accumulators in XC3000. V.1.01, Implemented in OrCAD 386+ V1.10. Unified Libraries xapp022v.zip 17KB Adders, Subtractors, and Accumulators in XC3000. V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp023v.zip 78KB Accelerating Loadable Counters in XC4000 V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp026o.zip 23KB Multiplexers and Barrel Shifters in XC3000. V.1.01, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp026v.zip 32KB Multiplexers and Barrel Shifters in XC3000. V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp028o.zip 5KB Frequency/Phase Comparator for Phase-Locked Loops. V.1.01, Implemented in OrCAD 386+ V1. Unified Libraries xapp028v.zip 6KB Frequency/Phase Comparator for Phase-Locked Loops. V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp029o.zip 6KB Serial Code Conversion Between BCD and Binary V.1.01, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp029v.zip 8KB Serial Code Conversion Between BCD and Binary V.1.01, Implemented in Viewdraw-LCA Unified Libraries xapp048o.zip 39KB Xilinx Guided Tour for XACT 5.0 V.1.00, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp048v.zip 37KB Xilinx Guided Tour for XACT 5.0 V.1.00, Implemented in Viewdraw-LCA Unified Libraries xapp002o.zip 187KB Loadable Up/Down Counters, 8 to 24 bits long V.2.0.1, Implemented in OrCAD 386+ V1.10 Unified Libraries xapp003v.zip 375KB Synchronous Presettable Up and Down Counters, 8, 12, and 16 bits long V.2.0.1, Implemented in Viewdraw-LCA Unified Libraries xapp004v.zip 282KB Loadable Binary Counters, 16, 32 bits long V.2.0.1, Implemented in Viewdraw-LCA Unified Libraries xapp036a.zip 6KB DRAM Controller for XC7200 ABEL and .pld Behavioral design files for a 4-port memory controller. Fits in an XC7236. xapp049a.zip 18KB Pentium/Synchronous DRAM Controller Behavioral Design Example for EPLDs ABEL files, V.1.00 xap4007v.zip 29KB Boundary Scan Emulator for XC3000 Implemented in Viewdraw-LCA Pre-Unified Libraries xap4021v.zip 114KB 150 MHz Dual-Prescaler Presettable Counters for XC3000. V.1.00, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4006v.zip 84KB RAM-Based FIFO for XC4000 V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4009v.zip 40KB Frequency Synthesizer, FSK Modulator V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xapp006v.zip 84KB RAM-Based FIFO for XC4000 V.1.10, Implemented in Viewdraw-LCA Unified Libraries xap4005v.zip 101KB Register-Based FIFO for XC3000 V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4004v.zip 350KB Loadable Binary Counters, 16, 32 bits long V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4003v.zip 196KB Synchronous Presettable Up and Down Counters, 8, 12, and 16 bits long V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4002v.zip 273KB Loadable Up/Down Counters, 8 to 24 bits long V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries xap4001v.zip 149KB 60 MHz Counters, 8 to 24 bits long V.1.10, Implemented in Viewdraw-LCA Pre-Unified Libraries ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information for the XACT core tools on a PC platform. ***Note: See /ftp/doc/misc/lit.txt for a full listing of available Xilinx literature availible upon request. ============================================================================= Filename Size File Description ============================================================================= desmgr.pdf 1,460KB Design Manager Flow Engine Reference / User Guide dsref1.pdf 907KB Development System Reference Guide Volume 1 dsref2.pdf 1,796KB Development System Reference Guide Volume 2 dsref3.pdf 1,498KB Development System Reference Guide Volume 3 dsuser.pdf 1,434KB Development System Users Guide floorpln.pdf 1,787KB Floorplanner Reference/User Guide hardware.pdf 1,221KB Hardware and Peripherals User Guide hdlsynth.pdf 2,212KB HDL Synthesis For FPGAs Design Guide hdwdebug.pdf 2,881KB Hardware Debugger Reference/User Guide hw130doc.pdf 329 kB XACTstep HW-130 Programmer User Guide For All Platforms Uploaded: 02-13-97 install.pdf 662KB Getting Started Installation Guide (XACT 5.2.x/6.0.x) library.pdf 4,406KB Libraries Guide (for 2000, 3000, 4000, and 7000) libsupl.pdf 1,448KB Libraries Supplement Guide (for XC4000E and 5200) promfile.pdf 649KB PROM File Formatter Reference/User Guide timing.pdf 3,174KB Timing Analyzer Reference/User Guide xblox.pdf 1,030KB X-BLOX Reference/User Guide xnfspec.pdf 390KB Xilinx Netlist Format (XNF) Specification Version 6.1 June 1, 1995 xnfspc61.tar 850KB Postscript files of the XNF Specification. This file is compressed and tar'ed. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
***Note*** Abeltut.zip, cpldtut.zip, fndtut.zip, and xacttut.zip are all stand-alone tutorials for their particular product and contain the interface files necessary for the tutoial to work. If you do not wish to download an entire set of tutorials and just want a tutorial on a specific product feature (for instance : floorplanner), you may download masttut.zip, which contains only the interface files but no tutorial modules and then download the corresponding tutorial module(s) from the tutorials_module directory. If you have installed any of the interfaces below, you will have the interface files to use any of the module files. Please look in the tutorials_modules directory 00_index file for a complete listing of tutorial module files. Please read the enclosed readme.txt file for installation instructions. ============================================================================= Filename Size File Description ============================================================================= abeltut.zip 1,673KB Windows 3.1.x/95 based tutorials on using the XABEL-CPLD software. (for XC7000 and XC9000 families) cpldtut.zip 2,585KB Windows 3.1.x/95 based tutorials on using the XACT-CPLD software for targeting the XC9500 family. fndtut.zip 1,733KB Windows 3.1.x/95 based tutorials on using the Xilinx Founadtion design entry software. (For all Xilinx families). masttut.zip 1,239KB Windows 3.1.x/95 based tutorial interface. In order to use this software you will need to download modules from the /modules directory. xacttut.zip 4,712KB Windows 3.1.x/95 based tutorials on using the XACT-CPLD software for targeting the XC2000, XC3000, XC4000, XC5200 and XC7000 families. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
***Note*** In order to use any of these modules you will first need to install any of the tutorial interfaces found in /ftp/doc/tut. Please read the eclosed readme.txt files for installation instructions. ============================================================================= Filename Size File Description ============================================================================= aldectut.zip 495KB Tutorial for using the Foundation design entry software (Schematic and Symbol entry, Simulation, more) For all Xilinx families. cdmtutor.zip 340KB Tutorial for the XACT-CPLD Design Manager Interface. (XC9500 family) ceztutor.zip 405KB Tutorial for the XACT-CPLD EZTAG 9500 downloading software. cfetutor.zip 165KB Tutorial for the XACT-CPLD Flow Engine interface. (Xc9500 family) ctatutor.zip 417KB Tutorial for the XACT-CPLD Timing Analyzer interface. (XC9500 family) dmtutor.zip 336KB Tutorial for using the XACT-Step Design Manager interface. (XC2000, XC3000, XC4000, XC5200 and XC7000 families) fetutor.zip 165KB Tutorial for using the XACT-Step Flow Engine interface. (XC2000, XC3000, XC4000, XC5200 and XC7000 families) fptutor.zip 1,058KB Tutorial for using the XACT-Step Floorplanner interface. (XC3000, XC4000, XC5200 families) hddg.zip 703KB Tutorial for High Density Design Methodologies using FPGAs. hdtutor.zip 394KB Tutorial for using the XACT-Step Hardware Debugger to program Xilinx FPGAs. pftutor.zip 379KB Tutorial for using the XACT-Step PROM File Formatter to create PROM files from FPGA bit streams. tatutor.zip 417KB Tutorial for using the XACT-Step Timing Analyzer to find the timing performance of your Xilinx design. (XC3000, XC4000, XC5200 and XC7000 families) tbook.zip 435KB Tutorial for using the XABEL-CPLD Software for the XC7000 and XC9500 families. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Documentation for M1 software release. ***Note: See /ftp/doc/misc/lit.txt for a full listing of available Xilinx literature availible upon request. ============================================================================= Filename Size File Description ============================================================================= beta1rel.pdf 56 kB M1 NT Beta1 Release Notes For Win NT 4.0 Uploaded: 02-25-97 hotshet1.pdf 7 kB M1 NT Beta1 Release Notes For Win NT 4.0 Uploaded: 02-25-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3rd party interfaces documetation that are supported by Xilinx. **Note: See /ftp/doc/misc/lit.txt for a full listing of available Xilinx literature availible upon request. ============================================================================= Filename Size File Description ============================================================================= config.pdf 1,112KB Foundation Configuration Information manhde.pdf 798KB Foundation HDL Editor Users guide manpcm.pdf 734KB Foundation Design Process Management (How to use Project Manager for Foundation) mansc.pdf 5,530KB Foundation Schematic Editor Users Guide mansim.pdf 3,655KB Foundation Logic Simulator Users Guide mentor.pdf 2,671KB Mentor Graphics Interface/Tutorial Guide notes.pdf 413KB Misc. notes on using the Foundation tools orcad.pdf 1,832KB OrCAD Interface/Tutorial Guide timesim.pdf 154KB Foundation Timing Simulation Tutorial promfile.pdf 649KB PROM File Formatter Reference/User Guide vhdl_mug.pdf 838KB Metamore version 2.3 Users Guide (VHDL Compiler for Foundation toolset) vlogint.pdf 107KB Full documentation for ES-VERILOG v5.2.0 Interface to Verilog-XL vlintrfc.pdf 2,121KB ViewLogic Interface Guide vltutor.pdf 2,557KB Viewlogic Tutorials (Pro-Series based) xabel.pdf 1,459KB Xilinx ABEL User Guide xlxman.pdf 444KB Foundation-Xilinx Interface Guide xsi_fpga.pdf 1,621KB Synopsys (XSI) For FPGAs Interface/Tutorials Guide xsi_note.pdf 149KB XACTstep Version 5.2/6.0 Synopsys Release Notes ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Documentation related to cpld design methodology. ***Note: See /ftp/doc/misc/lit.txt for a full listing of available Xilinx literature availible upon request. ============================================================================= Filename Size File Description ============================================================================= eplddes.pdf 1,568KB XEPLD Design Guide epldref.pdf 1,568KB XEPLD Reference Guide epldrefw.pdf 1,374KB XEPLD (For Windows) Reference Guide epldsch.pdf 686KB XEPLD Schematic Design Guide epldschw.pdf 691KB XEPLD Schematic (For Windows) Design Guide epldvsyn.pdf 1,755KB XEPLD Viewsynthesis Design Guide eztag.pdf 302KB EZTAG User Guide lib.pdf 2,464KB Libraries Guide (for XC7000 and XC9500) ref.pdf 1,031KB XEPLD (For Windows) Reference Guide (for XC9500) sdg.pdf 513KB XEPLD Schematic Design Guide (for XC9500) xnf61_7k.pdf 21KB XNF XC7000 Specification Addendum to Xilinx XNF Specification xsi.pdf 549KB CPLD XSI Design Guide (for XC9500) xsi_epld.pdf 682KB Synopsys (XSI) For EPLDs Interface/Tutorials Guide (for XC7000) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the 4KEX Beta Software ============================================================================= Filename Size File Description ============================================================================= 4036xl.tar 13 kB Adds HQ208 and HQ240 to 4036XL. For HP-UX Uploaded: 03-19-97 all_hp.tar 2113 kB All M1.1.1a patches except speed files For HP-UX Uploaded: 03-05-97 all_sol.tar 2858 kB All M1.1.1a patches except speed files For Solaris 2.x Uploaded: 03-05-97 all_sun.tar 2156 kB All M1.1.1a patches except speed files For SunOS 4.x Uploaded: 03-05-97 map_hp.tar 1381 kB M1.1.1a map patches For HP-UX Uploaded: 03-04-97 map_sol.tar 1400 kB M1.1.1a map patches For Solaris 2.x Uploaded: 03-04-97 map_sun.tar 1297 kB M1.1.1a map patches For SunOS 4.x Uploaded: 03-04-97 par_hp.tar 471 kB M1.1.1a PAR patch For HP-UX Uploaded: 03-05-97 par_sol.tar 320 kB M1.1.1a par patches For Solaris 2.x Uploaded: 03-05-97 par_sun.tar 319 kB M1.1.1a PAR patch For SunOS 4.x Uploaded: 03-05-97 speed.tar 5705 kB M1.1.1a speed file patch For HP-UX, Solaris 2.x, SunOS 4.x Uploaded: 03-05-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Boundary Scan Description Language Files For Xilinx Devices ============================================================================= Filename Size File Description ============================================================================= 4002bsdl.zip 11475 XC4002 BSDL files for PC84, VQ100, PQ100, and PG120 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4003bsdl.zip 16152 XC4003 BSDL files for PC84, CB100, VQ100, PQ100, and PG120 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4004bsdl.zip 14097 XC4004 BSDL files for PC84, PG120, PQ160, and TQ144 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4005bsdl.zip 26481 XC4005 BSDL files for PC84, PQ100, TQ144, PG156, CB164, PQ160, and PQ208 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4006bsdl.zip 19999 XC4006 BSDL files for PC84, TQ144, PG156, PQ160, and PQ208 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4008bsdl.zip 21918 XC4008 BSDL files for PC84, PQ160, PG191, CB196, and PQ208 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4010bsdl.zip 32523 XC4010 BSDL files for PC84, PQ160, TQ176, PQ191, CB196, PQ208, and BG225 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4013bsdl.zip 26713 XC4013 BSDL files for PQ160, PQ208, PG223, PQ223, BG225, and PQ240 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4020bsdl.zip 17002 XC4020 BSDL files for HQ208, PQ223, and HQ240 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4025bsdl.zip 26001 XC4025 BSDL files for PG223, PG299, PQ299, and HQ304 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4036bsdl.zip 15 kB BSDL files for xc4036ex/xl For All Platforms Uploaded: 02-27-97 4a04bsdl.zip 14108 XC4004A BSDL files for PC84 PG120, TQ144, and PQ160 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4h03bsdl.zip 10293 XC4003H BSDL files for PG191 and PQ208 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 4h05bsdl.zip 11628 XC4005H BSDL files for PG223 and MQ240 packages For All Platforms Uploaded on Tue Feb 25 17:10:30 PST 1997 5200bsm.zip 134KB BSDL files for 5200 devices 5202bsm.zip 17KB BSDL files for 5202 devices 5204bsm.zip 26KB BSDL files for 5204 devices 5206bsm.zip 35KB BSDL files for the 5206 family used with third party test and debug tools For All Platforms Uploaded on Mon Dec 23 15:49:30 PST 1996 5210bsm.zip 49KB BSDL files for the 5210 family used with third party test and debug tools For All Platforms Uploaded on Mon Dec 23 15:49:52 PST 1996 5215bsm.zip 52KB BSDL files for the 5215 family used with third party test and debug tools For All Platforms Uploaded on Mon Dec 23 15:50:10 PST 1996 xc95108.zip 13 kB XC95108 BSDL files for PC84, PQ100, TQ100 and PQ160 packages For All Platforms Uploaded: 02-20-97 xc95216.zip 11 kB XC95216 BSDL files for PQ160 and HQ208 packages For All Platforms Uploaded: 02-20-97 xc95288.zip 7 kB XC95288 BSDL file for HQ208 For All Platforms Uploaded: 02-20-97 xc9536.zip 3 kB XC9536 BSDL files for PC44 and VQ44 packages For All Platforms Uploaded: 02-20-97 xc9572.zip 11 kB XC9572 BSDL files for PC44, PC84, PQ100 and TQ100 packages For All Platforms Uploaded: 02-20-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Xilinx-Cadence Interface ============================================================================= Filename Size File Description ============================================================================= vconfig.tar 20KB Two-part patch for Verilog-XL v2.1.2 to verilog.tar 4044KB fix core dump problem when +neg_tchk option is specified. The two archives are needed to compile a configurable version of Verilog-XL (one that can be linked to PLI routines). vlogintd.ps 172KB Full documentation for ES-VERILOG v5.2.0 Interface to Verilog-XL (PostScript format) For SunOS 4.x vlogihp7.tar 883KB ES-Verilog interface for 2K, 3K, 4K, 4KE, 5K and 7K architecturess from XACTstep Core Tools v5.2.1 for work- stations--(HP7) vlogisun.tar 1043KB ES-Verilog interface for 2K, 3K, 4K, 4KE, 5K and 7K architectures from XACTstep Core Tools v5.2.1 for work- stations--(Sun4) pre5cds3.pdf 37 kB Application note describing workarounds for using the pre- Unified / pre-9404 Cadence Concept and Composer libraries and interface with XACT 5.x. Solution #: 1716 For All Platforms Uploaded: 03-13-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information for Using 9500 CPLD Software ============================================================================= Filename Size File Description ============================================================================= abeldemo.zip 0 kB XC9536 ISP Demo Board Johnson Shift Counter ABEL design. For All Platforms Uploaded: 02-27-97 abelhlp.zip 1547KB Windows based help files for XABEL-CPLD cpld.lst 13KB CPLD Software Patch Descriptions eisp_hp.tar 291KB XC9500 Embedded System ISP Code for the application note : XC9500 In-System Porgramming Using an 8051 Microcontroller. HP-version eisp_pc.zip 121KB XC9500 Embedded System ISP Code for the application note : XC9500 In-System Porgramming Using an 8051 Microcontroller. PC-version eisp_sn.tar 759KB XC9500 Embedded System ISP Code for the application note : XC9500 In-System Porgramming Using an 8051 Microcontroller. Sun4-version eisp_sol.tar 483KB XC9500 Embedded System ISP Code for the application note : XC9500 In-System Porgramming Using an 8051 Microcontroller. Solaris-version eztag_hp.tar 785KB See CPLD.LST For HP-UX eztag_pc.zip 806KB See CPLD.LST For Windows 3.1.x eztag_sn.tar 760KB See CPLD.LST For SunOS 4.x fitterhp.tar 6389KB See CPLD.LST For HP-UX fitterpc.zip 2321KB See CPLD.LST For Windows 3.1.x fittersn.tar 3055KB See CPLD.LST For SunOS 4.x h3070_hp.tar 107KB HP3070 XC9500 ISP Support Software For HP-UX h3070_pc.zip 62KB HP3070 XC9500 ISP Support Software For Win3.1.x and Win95 h3070_sn.tar 95KB HP3070 XC9500 ISP Support Software For SunOS 4.x, Solaris men9k.tar 138KB See cpld.lst ver9khp.tar 401KB See cpld.lst ver9ksun.tar 598KB See cpld.lst vhdldemo.zip 0 kB XC9536 ISP Demo Board Johnson Shift Counter VHDL design. For All Platforms Uploaded: 02-27-97 vsprom.zip 5 kB Application to program high-density XC4000E/EX using a XC7336 (1-Mbit Virtual SPROM Downloader) XC7336 ABEL file and associated programming file enclosed. For All Unix, DOS, Win 3.11, Win 95 Uploaded: 03-05-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Foundation-Series Software ============================================================================= Filename Size File Description ============================================================================= xfpga.zip 89KB FPGA/EPLD Device symbols library for Board Level Simulation fdn7000.zip 702KB Xilinx XC7000 Library Patch that fixes problems found on several XC7000 library symbols w32s13c.zip 3037KB Win32s version 1.30C This version fixes various Foundation issues FOUNDATION SERVICE PACK - The following files comprise the Service Pack: ============================================================================= Filename Size File Description ============================================================================= servpack.txt 11KB Contains information and installation instructions for the Service Pack. whatsnew.hlp 229KB Help file containing information on Parts A and B of the Service Pack. This file is contained in SPXA.EXE and SPXB.EXE, so there is no need to download this if you have downloaded SPXA.EXE or SPXB.EXE. whatnewx.hlp 13KB Help file containing information on Part V of the Service Pack. This file is contained in SPXV.EXE, so there is no need to download this if you have downloaded SPXV.EXE. spxa.exe 4314KB Part "A" of the Service Pack. Contains updates to the Schematic Tool, Symbol Editor, Project Manager, and HDL Editor. spxb.exe 1894KB Part "B". Contains a new version of the Simulator. spxv.exe 3240KB Part "V". Contains a new version of the XVHDL Compiler (v2.4.4). fnddoc1a.exe 857KB Version 1a of the Documentation Update Pack; supercedes version 1. This is an optional supplement to the Service Pack. fnddoc1a.txt 3KB Contains information and suggested instal- lation location for the Documentation Update Pack. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
IBIS models of Xilinx device families for use with some Third Party Simulators. ============================================================================= Filename Size File Description ============================================================================= xc2000.zip 5KB IBIS models for the XC2000 family used with third party simulation tools For All Platforms Uploaded: 12-23-96 xc3kal.zip 11KB IBIS models for the XC3000A/L families used with third party simulation tools For All Platforms Uploaded: 12-23-96 xc4kel.zip 22KB IBIS models for the 4000E/L families used with third party simulation tools For All Platforms Uploaded: 12-23-96 xc4kex.zip 5KB IBIS models for the 4000EX family used with third party simulation tools For All Platforms Uploaded: 12-23-96 xc5000.zip 5KB IBIS models for the XC5200 family used with third party simulation tools For All Platforms Uploaded: 12-23-96 xc4kxl.zip 4 kB IBIS model for the XC4000xl family. For All Platforms Uploaded: 02-27-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Xilinx-Mentor Interface ============================================================================= Filename Size File Description ============================================================================= b1_521h.tar 6610KB XACT 5.2.1 patch on HP-UX for Mentor B.1, GEN_SCH8 and XBLXGS b1_521s.tar 5315KB XACT 5.2.1 patch on SunOS for Mentor B.1, GEN_SCH8 and XBLXGS boardmen.tar 7KB Quicksim II board-level simulation scripts as described in Solution 619 For All UNIX Systems c16men5k.tar 46KB Mentor XC5200 library fix for COMPMC16 mbapp.tar 2KB MBA post-processing script, modified for Solution 618 to improve back-annotation with Autologic designs men_4kl.tar 30KB Fixed Men2XNF8, Fncsim8, and Timsim8 scripts for XC4000L men9k.tar 114KB Mentor interface patch for designing with XC9500 devices under XACT 5.x solarmen.tar 87KB Mentor libraries, Solaris-compatible RAM and ROM simulation models ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Xilinx-OrCAD Interface ============================================================================= Filename Size File Description ============================================================================= xolb.zip 425KB Unified Libraries for Capture, with Xilinx default properties or4sdt2.zip 159KB 4.X Orcad 2k Library or4sdt3.zip 511KB 4.X Orcad 3k Library or4sdt4.zip 625KB 4.X Orcad 4k Library or4sdt7.zip 81KB 4.X Orcad 7k Library or4vst.zip 63KB 4.X Orcad Simulator Files orlibsrc.zip 127KB Source files for Xilinx libraries, v4.20 orcsrc.zip 85KB Source files for Xilinx libraries, v5.00 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Xilinx device package files for use with the XACT core tools. ============================================================================= Filename Size File Description ============================================================================= 3x90t144.zip 10KB Data files to allow XACT 6.0.x/5.2.x software target a 3x90 and 3x90L T144 device. 5200pkgs.zip 15KB 5200 package file update for: 5206TQ176, 5210TQ176, 5215BG225, 5215PQ160, 5215PQ208, and 5215PQ240 4025q228.pkg 3KB XC4025E CB228 Package File Place this file in the $XACT/data directory. 4005p100.zip 5KB Package file and partlist.xct file for targeting the 4005PQ100 device xc4kb225.zip 1KB Package file for the 4010 and 4013 CB225 Devices 4010t176.pkg 2KB Package file for the 4010TQ176 Place this file in the $XACT/data directory. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files relating to Xilinx Programmers and PROMs. ============================================================================= Filename Size File Description ============================================================================= xpp_520.zip 127KB XPP rev. 5.2.0 for the HW-112 Programmer with revised and enhanced SPROM algorithms promform.txt 9KB PROM file formats explanation - EXO, MCS, TEK xpgmv160.zip 151KB Version 1.60 of the DEM XPGM software For DOS hw130.zip 520KB HW-130 Host Software Ver. 4.0.0 for DOS For DOS hw130w.zip 680KB Hw-130 Host Software Ver. 4.0.0 for Windows 3.1.1, NT, and 95 For Windows 3.1.x/95/NT hw130sn4.tar 1620KB HW-130 Host Software Ver. 4.0.0 for the Sun Workstations For SunOS 4.x hw130sl4.tar 1641KB HW-130 Host Software Ver. 4.0.0 for Solaris Workstations For Solaris hw130hp4.tar 1759KB HW-130 Host Software Ver. 4.0.0 for HP9000/ 700 Workstations For HP-UX hw130ib4.tar 2563KB HW-130 Host Software for IBM RS6000 Workstations For IBM RS6000 128_256d.zip 9 kB Revised xc17128d and xc17256d algorithms for the HW-112 Programmer. For All Unix, DOS Uploaded: 02-18-97 128_256d.tar 12 kB Revised xc17128d and xc17256d agorithms for the HW-112 programmer. For All Unix Uploaded: 02-24-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Xilinx device speed files for XACT software (for Timing Simulation). ============================================================================= Filename Size File Description ============================================================================= 5210.spd 9KB Preliminary -4 speed file for 5210 3kl-teck.zip 3KB 3000L Speed file update with improved Teck parameter 3100aspd.zip 21KB Speeds file update for 3100A Parts- Includes -09 speed grade. hw_spd98.zip 6KB 06-16-93 SPEEDS.XCT for Hardwire Parts 4kespds.zip 39KB XACTStep 4000E Advanced -1 and Preliminary -2 speed files (except the 4025E). Please read the readme.txt file for installation instructions. For all platforms Uploaded 02-10-97 4kespds.tar 61KB XACTStep 4000E Advanced -1 and Preliminary -2 speed files (except the 4025E). Please read the readme.txt file for installation instructions. For all platforms Uploaded 02-10-97 4kldata.zip 16 kB premilinary xc4000l -5 speeds files, partlist.xct For All Platforms Uploaded: 02-20-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Xilinx-Synopsys Interface (XSI) **Note** For XSI documentation, Please look in /ftp/doc for the following files : xsi.pdf, xsi_fpga.pdf, xsi_epld.pdf, and xsi_note.pdf. ======================================================================= Filename Size File Description ======================================================================= xsi_files.tar 83KB * Tactical Code * XNF Files for RPMs * Default Synopsys setup file xsi_veri.tar 2974KB Verilog Examples from HDL Synthesis for FPGAs Design Guide xsi_vhdl.tar 5115KB VHDL Examples with SIM, SYN and MRA files in Work directory xsivnowk.tar 3253KB VHDL Examples without SIM, SYN and MRA files in Work directory addmktnm.tar 13KB Addtnm version 2.3.4 and Maketnm version 2.3.3 perl script utilities for adding timespecs to xnf files xbloxgen.tar 27KB Xbloxgen version 1.15 utility which allows you to instantiate X-BLOX components xsi4ke4.tar 1192KB XSI 5.2.1 4ke-4 .db Files xsisy33b.tar 14980KB Compiled 5.2.1 Designware and Simulation Libraries for Synopsys 3.3b xsisy34a.tar 15099kB Compiled 5.2.1 Designware and Simulation Libraries for Synopsys 3.4a xsisy34b.tar 14980KB Compiled 5.2.1 Designware and Simulation Libraries for Synopsys 3.4b xsisy35a.tar 15002KB XSI 5.2.1 DesignWare and Simulation Libraries Compiled for Synopsys 3.5a For All UNIX Systems xsi33b5k.tar 901KB XSI 5.2.1 5210-4, 5215-5, 5215-6 .db files These files are compatible with XSI 5.2.1 and Synopsys 3.3b or greater For All UNIX Systems xsi31a.tar 514KB XSI 5.2.1 .db synthesis files for the XC3100A -1 & -09 speeds. These .db files are to be used with XSI 5.2.1, and Synopsys 3.3b and above. For All UNIX Systems See Solution Record 1709 Uploaded on Thu Jan 16 20:04:12 PST 1997 xsi4ke2.tar 1051KB XSI 5.2.1 .db synthesis files for the XC4000E -2 speeds. These .db files are to be used with XSI 5.2.1, and Synopsys 3.3b and above. For All UNIX Platforms Solution #: 1708 Uploaded: 01-16-97 xprsdgde.zip 124 kB Synopsys FPGA Express Design Guide v1.0 For All Windows Uploaded: 02-24-97 xprs103.zip 866 kB Update of FPGA Express to v1.03 For All Windows Uploaded: 02-28-97 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information on the Xilinx-Viewlogic Interface ============================================================================ Filename Size File Description ============================================================================ wvosim.zip 128KB Xsimmake patches for Workview Office 7.2 on Win95 with XACT 5.2.x/6.0.x For Win95 and WinNT psfmvs5.zip 79KB Pro-Flow for ViwSynthesis proc.zip 437KB 6.0 Procapture executable (can be used as a temporary fix to some print problems) synrefs.zip 652KB Viewsynthesis Documentation 60keyfix.zip 1072KB Versions of PROCapture, PROSim, and PROwave that work with C key attached to printer xilpro.wv 4KB License file for PROseries software profix.zip 1093KB Missing files for 5.1.1 install of Proseries xbuiltin.zip 7KB Unified XBuiltin library builtin.zip 45KB Unified Builtin library iopad.zip 2KB Inserts I/O buffers to Viewsynthesis designs newidfix.zip 163KB NEW_ID executable for updating Viewsynthesis licensing lic390.zip 1KB Permanent license for Xilinx AB key lic290.zip 1KB Permanent license for Xilinx AA key vl3klib.zip 200KB x3000 and mx3000 4.1 libraries. x4000.zip 36KB For use with 4.01 Interface ONLY X4000 Library. Fixes RAM32X1 & INLAT xsim_pv6.tar 26KB xsimmake.xfw file for Powerview 6.0 or newer For All UNIX Systems 4025e_pg.zip 6KB BSDL file for the 4025e PG223 device 4ke_sml.zip 9 kB xc4000e.sml file for Viewsynthesis 7.2 and earlier. See Solution Number 1482 For All Windows m1libs.zip 1 kB Library description file (LIBS.LST) for Workview Office. For use with M1 tools only. For All Windows vaninit.zip 2 kB Updated VANINIT script for use with M1 Tools, Workview Office, and the Synopsys Speedwave libraries. For All Windows ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information for the XACT core tools on a PC platform. ============================================================================= Filename Size File Description ============================================================================= prep_nt.zip 452KB XNFPREP patch for use on Windows NT only makebits.zip 705KB Patch for Makebits 5.2.1/6.0.1, fixes problem when using makebits with the tied option on a 5200 Device. For PC neocd_nt.zip 38KB NT device driver patch enables XACT Foundry 7.0 to run on NT machines. This device driver is only compatible with the "new" white security devices from MemoPlug. 3x90t144.zip 10KB Data files to allow XACT 6.0.x/5.2.x software target a 3x90 and 3x90L T144 device. chkinitp.zip 185KB PC version - program to check the INIT= win_nt.zip 1KB PIF file for using XACT 5.2 within Windows NT x60fixpc.zip 308KB Fixes for XACT 6.0 (PC platform) 5215pfix.zip 2KB Fix for 5215 PQ208 and PQ240 pacakge files in XACTstep 6.0. wg1001.exe 22KB Microsoft patch for Windows to use the Hardware Debugger with fast pentiums (>90MHz) hd1061.exe 28KB Updated MS Mouse driver to correct growstub error 511fix.zip 120KB Patch for PROSeries 5.1.1 install problems (XKEY v5.1.1, SYSBLOCK.PIF, SYSCMD.PIF, and REDIRERR.EXE) ww1000.exe 22KB Patch version of VSHARE.386 to allow ProCapture and VSM to run simultaneously rainport.exe 31KB Fix for using key with Windows NT 301.exe 117KB ATM 3.01 Update (Must have 3.00) rpmcon.zip 24KB RPM Constraint Utility for the PC 3kabsd.zip 975KB XACT 5.0 patch for 3x00A/L BSD files ppr_emul.zip 1067KB PPR patch for Base Development System v5.0 - Contains PPR.EXE stub and EMUL\PPR.EXE for - 386 PC's which do not have math coprocessor ppr_math.zip 1043KB PPR patch for Base Development System v5.0 - Contains PPR.EXE stub and MATHCP\PPR.EXE - for 386 PC's with math coprocessor, and - 486 machines and above. xkeyemul.zip 112KB Version of XKEY v5.0 which does not require floating point coprocessor gndh.zip 1KB GNDH hard macro for "Improving XC4000 Design Performance" gndhm.zip 1KB GNDH hard macro. Generates a GND signal can be used to drive the L pin on an INLAT symbol in order to get the transparent latch delay 3k_roms.zip 9KB XC3000 ROM soft macros download.zip 66KB Executable for download cable dn_ld.zip 66KB C source code for serial download of .bit fil bitg70p.zip 291KB Fixes out of memory problem running bitgen on 4025 on PC For DOS and Windows l2x521i.zip 233KB LCA2XNF v5.2.1i patch to fix bug in which it writes out 5-input logic gates for XC5200 designs. For DOS xchkr4ke.zip 177KB This zip file contains the new xchecker program with nessacery system file for xchecker to readback 4000E devices with new mask properly. Solution #: 1580 For DOS Uploaded on Mon Dec 9 18:05:39 PST 1996 xchecker.zip 365 kB Stand-alone XChecker (ver 5.2.1) software to download and readback configuration data for FPGAs Solution #: 989 For DOS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files/Patches/Information for the XACT core tools on workstation platforms. ============================================================================= Filename Size File Description ============================================================================= 4kefixhp.tar 1296KB Fixes for 4KE Pre-release v1.00 (HPPA Platform) 4kefixsn.tar 1340KB Fixes for 4KE Pre-release v1.00 (Sun Platform) cdicsh.tar 12KB C-shell script for non-graphical install of XACT 5.2.0 or 5.2.1 for SunOS, HPUX, Solaris and RS6000 Operating Systems) chkinihp.tar 228KB HP version - program to check the INIT= chkinirs.tar 295KB RS6000 version - program to check the INIT= chkinisn.tar 271KB Sun version - program to check the INIT= gui520.tar 6672KB 5.2.0 RS6000 executables that bring up a GUI. Includes XDE, XACT, MAKEPROM, and XDELAY. This is a fix for problems running 5.2.1 GUIs on a RS6000 PowerPC platform using AIX 4.x.x For IBM RS6000 lcaxnfhp.tar 304KB LCA2XNF v5.2.1i patch to fix bug in which it writes out 5-input logic gates for XC5200 designs. For HP-UX lcaxnfsn.tar 357KB LCA2XNF v5.2.1i patch to fix bug in which it writes out 5-input logic gates for XC5200 designs. For SunOS 4.x solarisl.tar 301KB XACT license Manager for Solaris. Read the readme.txt for installation instructions. x520fxhp.tar 418KB Fixes for XACT 5.2 (HPPA platform) x520fxsn.tar 463KB Fixes for XACT 5.2 (Sun platform) xchkr_hp.tar 307KB Version of XChecker to fix Readback problem for 4KE devices. For SunOS4.x and Solaris xchkr_sn.tar 294KB Version of XChecker to fix Readback problem for 4KE devices. For SunOS4.x and Solaris ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Utilities Relating to Third Party interfaces ============================================================================= Filename Size File Description ============================================================================= amtnm.zip 8KB addtnm v2.3.4 and makenmt v 2.3.3 dp2abel.zip 11KB Creates an .ABL file for Pipelined Clock dividers of some specified length. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Utilities Relating to Xilinx EPLDs and CPLDs ============================================================================= Filename Size File Description ============================================================================= timh.zip 148KB XC7000 static timing analyzer (HP version) timp.zip 242KB XC7000 static timing analyzer (PC version) tims.zip 155KB XC7000 static timing analyzer (Sun version) i2x.zip 37KB Utility to convert Intel iFX700 files to EPLD format x2p.zip 102KB XNF to PLUSASM translator pla2eqnx.zip 126KB ABEL PLA to PLUSASM translator am2xc.exe 43KB Self-extracting ZIP file to convert MACH to Xilinx ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Utilities Relating to Xilinx FPGAs ============================================================================= Filename Size File Description ============================================================================= rpmconhp.zip 11KB RPM Constraint Utility for the HP rpmconsp.zip 9KB RPM Constraint Utility for the Sparc power.zip 95KB Power Consumption Estimation utility for 2k, 3k and 4k parts lfsr.zip 37KB Utility to aid in designing linear feedback shift registers. ioloc.zip 94KB Reads IO locations from LCA file and creates CST file for locking IOs. Also creates macro to backannotate IO locations to Viewlogic schematic. xnfdif.zip 70KB Compares 2 XNF or MAP files asic_est.zip 807KB Xilinx ASIC Estimator Utility DOS based tool which estimates the cost advanteges of FPGAs over traditional ASIC designs. For DOS 5.0 and better. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Utilities Relating to Xilinx PROMs ============================================================================= Filename Size File Description ============================================================================= dn_ld.zip 66KB C source code for serial download of .bit file hex2bits.zip 13KB Converts Stripped PROM file ( output of STRIPHEX ) to rawbits ( ascii '1's and '0's) format. PC Version. hexbitsn.tar 119KB Converts Stripped PROM file ( output of STRIPHEX ) to rawbits ( ascii '1's and '0's) format. Sparc version. makesrc.tar 20KB Generates C or Assembly code from an MCS format PROM file for embedded applications Sun Sparc version. makesrc.zip 43KB Generates C or Assembly code from an MCS format PROM file for embedded applications PC version. mkbs.zip 8KB Generates a hex file for 'broadside' loading of LCAs in the slave configuration mode. pconfig.zip 18KB Generates a PROM file from a data file containing byte ( hex ) or bit (rawbits) data psplit.zip 23KB Breaks up large PROM file in to a number of smaller PROM files. PC Version. psplithp.tar 63KB Breaks up large PROM file in to a number of smaller PROM files. HP Version. psplitsn.tar 107KB Breaks up large PROM file in to a number of smaller PROM files. Sparc version. stag.zip 8KB Converts Motorola extended 'S' record file to JEDEC. striphex.zip 15KB Strips PROM programmer related information from a PROM file (PC version). strphxsn.tar 112KB Strips PROM programmer related information from a PROM file (Sun4 version). ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ End of ftpfiles.lst