to view the 
PDF files below.
If you have comments, suggestions, would like a hard-copy subscription, or would like your design featured in XCELL, e-mail Brad Fawcett. You can also open the entire xcell19.pdf file from this AppLINX CD-ROM.
In this Q4 '95 issue...
Editorial
: 100,000 Gates and Beyond : By Bradly Fawcett
Xilinx is poised to deliver new FPGA solutions that fulfill the requirements
for very high density designs.
A
Unique Product Strategy
By Chuck Fox, Vice President of Product Marketing
Components, software, and service are all critical to a total product solution...
CUSTOMER
SUCCESS STORY : FPGAs Control ATM Connections to French Telecom Network
Latest
Literature, Upcoming Events, and Financial Results
One-day
XACTstep 6.0 Update Class
Tuition is just $100 in North America, but will be waived for those who
have had training since April, 1995.
Xilinx
Achieves Impressive Reliability Results
Xilinx
Earns ISO 9002 Certification
Introducing
the FastFLASH XC9500 Family
The industry's most complete solution of in-system programmable CPLDs
XC5200
Family Now in Volume Production
2-18,000 usable gates in 15 package options - over 100 size/speed/package
combinations
XC3100A-09:
The World's Fastest FPGA
A 50% boost in performance due to an improved manufacturing process
and layout
XC4000
Hi-Rel Product Family
Extended with Faster Speed Grades and New Packaging
SOFTWARE
: Logic Synthesis for FPGAs - An Update
What you synthesize is what you get...
SOFTWARE
: Executing from the XACTstep CD-ROM
Software can be executed directly from the CD-ROM...
Synchronous
RAM Improves System Speed
On-chip, distributed memory facilitates the efficient implementation
of register banks, status registers and high-speed FIFO buffers that bridge
the gap between subsystems that have different access times and data burst
rates.
Synchronous
RAM Timing in the XC4000E FPGA
With proper attention to address routing delays, synchronous RAMs can
be operated at, or close to, the maximum clock frequency, as determined
by the minimum write cycle time.
Sensitivity
to Power Glitches
Xilinx FPGAs do the safest thing possible when Vcc dips below 3Volts.
Readback
in FPGAs
Although originally intended for internal test, readback may be used
for other purposes...
XC4000
Drives 3.3V Devices Safely
5-Volt XC4000 & XC4000E can drive either 5V or 3.3V devices.
Minimizing
Power Consumption in FPGA Designs
Here are some techniques...
User-Defined
Schmitt Triggers
Reconfigurable
Computing Developer's Program
Applications
Update: PCI, ATM, DSP, Plug & Play, RC
Technical
Q&A
Answers to common issues from the Hot-line.
© 1996 Xilinx, Inc. All rights reserved
Trademarks and Patents