The Quarterly Journal for
Xilinx Programmable Logic Users
First Quarter, 1996

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If you have comments, suggestions, would like a hard-copy subscription, or would like your design featured in XCELL, e-mail Brad Fawcett.

You can also open the entire xcell20.pdf file from this AppLINX CD-ROM.

In this Q1 '96 issue...

Editorials
Editorial : PLDs, Pins and PCBs : By Bradly Fawcett
Tolerance of change is one of the prime attractions of programmable logic.
In-System Programming and Flash Technology for CPLDs
By Nick Kucharewski, Vice President, CPLD Division
The XC9500 family is the first CPLD family specifically developed to meet all the typical user requirements for in-system programmability.

Company News
Xilinx Enters Into Joint Venture for Foundry Capacity
Wim Roelandts New Xilinx CEO
Xilinx Ireland Earns ISO 9002 Certification
Latest Quarter's Financial Results

Product News
New Product Literature
Upcoming Events
What's New On-Line
Xilinx Alliance Goes On-Line
Latest Training Information on the Web
Introducing WebLINX SmartSearch
Xilinx Devices
Introducing the XC4000EX FPGA Family : 125,000 Gates
Designing with XC9500 CPLDs : First ISP Devices Based on 5-V Flash Technology
Low-Voltage Product Line Expands With XC3100L and XC4000L FPGA Families
XC4000E in Volume Production, -2 Speed Grades Sampling, and Software Shipping Today!
XC5200 Family on Record Pace
Development Systems
First LogiCore(tm) Module : PCI Interface
XABEL-CPLD Software Available Now - Evaluation CD Available
New XC7000 Core Software in XACTstep V6
Design Hints and Applications
DSP Application Design Contest
Design Hints : Selecting a Xilinx Product Family
JTAG Support in the XC9500 CPLD Family
FIFO Buffer Design in the XC4000E/EX FPGA Families
Distributed Arithmetic Laplacian Filter
Retargeting Designs in Mentor Graphics Design Architect
Metalithic Systems Exploits Real-Time Reconfigurability for Audio Processing
Using Decoupling Capacitors
Technical Q&A