The Quarterly Journal for
Xilinx Programmable Logic Users
Second Quarter, 1996

to view the PDF files below.

If you have comments, suggestions, would like a hard-copy subscription, or would like your design featured in XCELL, e-mail Brad Fawcett.

You can also open the entire xcell21.pdf file from the AppLINX CD-ROM.

In this Q2 '96 issue...

Editorials
Editorial : PLDs, Pins and PCBs, Part 2 : By Bradly Fawcett
Footprint compatibility maximizes PLD design flexibility, and has been incorporated in all Xilinx components since the XC2000 familty...
The First Ten Weeks
By Willem Roelandts, Chief Executive Officer
I can assure you that the major components of this highly successful strategy will not change...

General News
Customer Success Story : FPGAs Go"Down Under" in an ISDN Terminal Adapter
Xilinx Hosts University Workshops
New Product Literature
Upcoming Events
Hardware and Software Products
XC9500 CPLDs : Managing the "Product Life Cycle"
Foundation Series Software Solutions : VHDL Made Easy!
XACT-CPLD Supports Xilinx CPLD Design
New XACTstep ReleaseAdds XC4000E and XC9500 Family Support
Using OrCAD Capture and Simulate with XACTstep version 6
Running Xilinx Foundation Series Software on a Network
Using Viewlogic's Workview Office with XACTstep version 6
HDL Synthesis and Built-In Clock Enables
Design Hints and Applications
Ten-Digit Fully Synchronous BCD Counter Runs at 87 MHz
A Look at "Minimum" Delays
Visit comp.arch.fpga - The FPGA Newsgroup
Advanced Carry-Logic Techniques
PCI-Based Reconfigurable Computers
Technical Q & A : CPLDs, Mentor, Synopsys