The Quarterly Journal for
Xilinx Programmable Logic Users
First Quarter, 1997

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Editorials General News Components

Development System Design Hints and Applications Status Charts

If you have comments, suggestions, would like a hard-copy subscription, or would like your design featured in XCELL, use the response form or e-mail literature@xilinx.com.

In this Q1 '97 issue...

• Editorials
   From The Fawcett: Getting to the Core
  By Bradly Fawcett
  Taking advantage of increasing device capabilities can pose formidable challenges to the user - challenges that cannot always be met by traditional gate-level design techniques, or even HDLs and synthesis-based design. Design "cores" are becoming a key tool in meeting the twin challenges of increasing design complexity and shorter development cycles.
   Guest Editorial - 1997: The Year That Defines the Future
  By Sandeep Vij, Vice-President, Marketing
  Xilinx will be setting new standards for FPGA capacity, performance, and cost-effectiveness...

• General News
   New Look, More Content for WebLINX
  See also: What's New page
   Customer Success Story - Xilinx CPLDs Satisfy High-Speed Processing Needs for Transtech
   New Product Literature
   Upcoming Events
   Financial Results
   Technical Training Update - XACTstep M1 Course Available
  See also: Xilinx Training Courses page
   Xilinx 1997 Seminar Series - Coming Soon to a Location Near You
  

• Product Information - Components
   XC4062XL Debuts (cover story)
  Xilinx extends high-density FPGA leadership...
   Faster XC4000E-1 FPGAs Support High-Performance Applications
   Product Discontinuance Policy Update
  See also: Xilinx Customer Notifications page
   Xilinx Receives QML Certification
  Military/hi-rel product testing requirements reduced...
   XC5200 Family Breaks the $4 Price Barrier

• Product Information - Development Systems
   New XACTstep M1 Software for High-Density Design
   XABEL-CPLD Available for Windows 95 and 3.x
   Update Your Foundation Software with the v6.0.2 Service Pack
  Download the Service Pack
   ProSeries Users Upgraded with Workview Office
  OrCAD to Provide Support for OrCAD-Xilinx Interface
  Coming Soon: DSP Module Generator
  See also: Xilinx DSP page
   USB and PCMCIA AllianceCOREs Now Available
  The first AllianceCORE products are released by CAE/Inventra and Mobile Media Research...
  See also: Xilinx AllianceCORE page
   New LogiCORE PCI Target Eases System Integration
  See also: PCI Solutions page
   Virtual Computer Debuts XC6200 Development Kit
  See also: Virtual Computer web site

• Design Hints and Applications
   Benchmarks Again Demonstrate XC9500 Pinlocking Capabilities
  New benchmarks illustrate the superior performance and pin-locking capabilities of the FLASH-based XC9500 family.
   Trouble-Free Switching Between Clocks 
   Demultiplexing 200 MHz Data Streams
   FPGA Highs and Lows: Up in Space and Below the Surface 
   Using the HW-130 Programmer
   Technical Q & A: What should be done with unused I/O pins in an XC9500 CPLD design?
   Technical Support Resources - Start with the WebLINX "Answers" page

• Status Charts
   Q1 '97 Component Availability Chart
   Q1 '97 Programmer Support
   Q1 '97 Alliance Partners : Products, Platforms, Contacts
  See also: Xilinx Alliance page
   Q1 '97 Released Software Status

© 1997 Xilinx, Inc. All rights reserved