#!/bin/csh -f
#
#****************************************************************
#  This program is the Confidential and Proprietary product of 
#  Cadence Design Systems.  Any unauthorized use, reproduction 
#  or transfer of this program is strictly prohibited. 
#  
#  Copyright (c) 1989 - 1994, Cadence Design Systems, Inc. 
#  All rights reserved. 
#  
#  Filename:  timenetx 
#  Based on:  timenet 5.0
#  Purpose:   
#  Author:    nasir
#  Date:      March 1994
#  
#  History:   
#
#  timenetx
#  5.11b
#  3/29/95 Modified by Karlton Lau to support Xilinx Verilog 
#  	   standalone simulation only
#
#  4/24/95 Added new xnf2verilog 1.21G option to specify 
#	   generation of .sdf file along with .sdf file name
# 
#  8/01/95 Updated to omit stripschnmbuft step
#
#  9/26/95 Updated to run xdelay only if it has not already been run
#
#  10/23/95 Updated to support 4000E and 5200--v5.2.1a
#
#  5/5/96   Updated to support running steps before xnf2verilog in 
#           a specified run subdirectory. Copies designt.xcd back up 
#           to current working directory before xnf2verilog
#           - v5.2.1b
#
#***************************************************************/

set debug = 1

###################################################################
# Define UNIX programs
###################################################################

set rm = /bin/rm
set touch = /bin/touch
set mv = /bin/mv
set cp = /bin/cp

###################################################################
# Create log file
###################################################################

echo "*****************************************************************"
echo "*  Copyright (C) 1994                                           *"
echo "*  Cadence Design Systems Inc.  All Rights Reserved.            *"
echo "*  timenetx 5.2.1b                                              *"
echo "*****************************************************************"
echo

set logfile = $cwd/timenetx.log

set program = $rm
$rm -f $logfile
set ret = $status
if ( ! $ret == 0 ) then
  goto return_code
endif

set program = $touch
$touch $logfile
set ret = $status
if ( ! $ret == 0 ) then
  goto return_code
endif

echo "*****************************************************************" > $logfile
echo "*  Copyright (C) 1994                                           *" >> $logfile
echo "*  Cadence Design Systems Inc.  All Rights Reserved.            *" >> $logfile
echo "*  timenetx 5.2.1b                                              *" >> $logfile
echo "*****************************************************************" >> $logfile
echo "" >> $logfile

# Begin Variables
set program = timenetx
set ret = 0

if ( $1 == "-h"  || $1 == "-help" ) then
  goto usage
endif

if ( $1 == "" ) then
  goto brief_usage
endif

if ( $#argv < 2 ) then
  echo ""
  echo "ERROR: timenetx requires minimum of two arguments: design_name,"
  echo "architecture"
  echo "ERROR: timenetx requires minimum of two arguments: design_name," >> $logfile
  echo "architecture" >> $logfile
  set ret = 1
  goto brief_usage
endif


if (  ${?CDS_INTFC} ) then
    set interface_dir_set = 1
    setenv interface_dir  $CDS_INTFC 
    echo ""
    echo "   CDS_INTFC environment variable has been set to"
    echo "   $interface_dir"
    echo "" 

    echo "" >> $logfile
    echo "   CDS_INTFC environment variable has been set to" >> $logfile
    echo "   $interface_dir" >> $logfile
    echo "" >> $logfile
else  
  if ( ${?debug} ) then
    if ($debug == 1) then
    echo ""
    echo "   CDS_INTFC variable is not defined,"
    echo "   so the pin file and Verilog library should be specified"
    echo "   on the command line."
    echo ""
    echo "" >> $logfile
    echo "   CDS_INTFC variable is not defined,"  >> $logfile 
    echo "   so the pin file and Verilog library should be specified" >> $logfile  
    echo "   on the command line." >> $logfile  
    echo "" >> $logfile
    set interface_dir_set = 0
    endif
  endif
endif


set x2coption = ""
set design = $1:r
set ext = $1:e
set arch   = $2
      if ( $debug == 2 ) then
	echo "$arch = " $arch
      endif
set designt = $design\t

set xrundir = "$cwd" 
set curdir  = $cwd
set pinfile_specified = 0
set vlibs_specified = 0

# set default program flow.
set cdsonly = 0
set vmh2xnf = 0
set xdelay = 1
set lca2xnf = 1
set xnfba = 1
set x2vprep = 1
set xnf2verilog = 1
set stripschnmbuft = 0

if ( $arch == "4000E" ) then
      if ( ${?debug} ) then
	 echo "Converting 4000E to 4000e..."
      endif
      set arch = "4000e"
	 echo "arch reset to $arch..."
endif

if ( "$arch" != "7000" && "$arch" != "2000" && "$arch" != "3000" && "$arch" != "4000" && "$arch" != "4000e" && "$arch" != "5200" ) then
  echo ""
  echo "ERROR: Invalid architecture $arch" >> $logfile
  echo ERROR: Invalid architecture $arch
  echo exit 1 
  exit 1 
endif

if $?interface_dir then

   set pinfile = "$interface_dir/data/xc${arch}.pin"
   if (-e "$interface_dir/data/xc${arch}.pin") then 
     set pinfile_exists = 1
   endif
   echo "- pin file = $pinfile"

   set vlibs_specified = 0
   set vlibs = "$interface_dir/verilog${arch}"
   echo "- Verilog library  = $interface_dir/verilog${arch}"
   if (-e "$interface_dir/verilog${arch}/fdce.v") then 
     set vlibs_exists = 1
   endif

endif

if ( $ext == "" ) then
   set ext = "xff"
endif


shift
shift

while ($#argv)
  
  switch ($1)
	case -x:
	    	set xnfba = 0
		breaksw
	case -cds:
		set cdsonly  = 1
		breaksw
	case -vlibs:
		shift
		set vlibs = $1
		set vlibs_specified = 1
		set x2coption = "$x2coption -vlibs $1"
		breaksw
	case -r:
		shift
		set xrundir = $1
		 if ( $xrundir == "." ) then
		     set xrundir = "$cwd"
	         endif
		breaksw
	case -o:
		shift
		set designt = $1:r
		breaksw
	case -pin:
		shift
		set pinfile = $1
		set pinfile_specified = 1
		set x2coption = "$x2coption -pin $1"
		breaksw

	default:
		echo "ERROR: option not recognized $1" >> $logfile
		echo "ERROR: option not recognized $1"
                set ret = 1
                goto return_code
   	endsw
   	shift
end



# Check if design is from Synopsys 
if ($debug == 2) then
   echo "Design = $design..."
endif

echo ""
echo "Checking $design.$ext to see if design is from Synopsys..."
if (  { grep -s "^PROG, [S,s][Y,y][N,n][2][X,x][N,n][F,f]" $xrundir/$design.$ext } |  { grep -s "PROG, Synopsys" $xrundir/$design.$ext } ) then
   echo "Design is from Synopsys--skipping XNFBA..."
   echo ""
   set xnfba = 0
endif



# Original insertion point

set x2coption = "$x2coption  -arch $arch"

# Need to check on whether pinfile exists or -pin option specified

if (($pinfile_specified == 0) && $?interface_dir ) then
   set x2coption = "$x2coption -pin $pinfile"
endif

if ( ($vlibs_specified == 0) && $?interface_dir ) then 
   set x2coption = "$x2coption -vlibs $vlibs"
endif 

if ( $xrundir == "." ) then
   set xrundir = $cwd
endif

if ( ! -d $xrundir ) then
  echo "ERROR: directory $xrundir does not exist." >> $logfile
  echo ERROR: directory $xrundir does not exist.
  exit 1
endif

if ( ! -e $xrundir/$design.lca ) then
  echo "ERROR: $design.lca file does not exist." >> $logfile
  echo ERROR: $design.lca file does not exist.
  exit 1
endif

# If the LCA exists, check on whether Xdelay has already been run on it 

if (  { grep -s "xdelay" $xrundir/$design.lca } ) then
   echo "XDelay -dw already run--skipping XDelay..."
   set xdelay = 0

endif

if (${?debug}) then 
   echo "xdelay = $xdelay"
endif

#if ( $design == $designt ) then
#  echo "ERROR: The output design name cannot be same as the input name." >> $logfile
#  echo "ERROR: The output design name cannot be same as the input name." 
#  exit 1
#endif


###################################################################
# Startup messages
###################################################################
echo ""
echo "Design: 		$design"
echo "Design: 		$design" >> $logfile
echo "Output Design: 		$designt"
echo "Output Design: 		$designt" >> $logfile
#echo "Xilinx Run Directory: 	$xrundir"
#echo "Xilinx Run Directory: 	$xrundir" >> $logfile
echo "Log File:		$logfile:t"
echo ""
echo "" >> $logfile


cd $xrundir

if ( $cdsonly == 1 ) then
   set vmh2xnf  = 0
   set xdelay = 0
   set lca2xnf  = 0
   set xnfba  = 0
   cp $design.$ext $designt.$ext
endif

if ( $arch == "7000"  && $cdsonly == 0 ) then
  set vmh2xnf = 1
  set xdelay = 0
  set lca2xnf = 0
  set xnfba   = 0

  # stripschnmbuft no longer needed in 9504
  set stripschnmbuft = 0

  if ( (! -e $design.vmh) && (! -e $design.vmd) ) then
        echo "ERROR: $design.\[vmh|vmd\] does not exist in the $xrundir run directory." >> $logfile
	echo "ERROR: $design.[vmh|vmd] does not exist in the $xrundir run directory."
	exit 1
  endif
  

endif

if ( $vmh2xnf == 1 ) then
  set program = "vmh2xnf"
  echo Running vmh2xnf...
  echo Running vmh2xnf... >> $logfile
  echo "vmh2xnf -n  $design -l 5 -o $designt" >>& $logfile
  vmh2xnf -n $design -l 5 -o $designt >>& $logfile

  if ({ grep -s "\[Error\]" $logfile }) then
    set ret = 1
    goto return_code
  endif

  set ext = "xnf"
endif
 
#######
if ( $xdelay == 1 ) then
  if ( ! -e $design.lca ) then
	echo "ERROR: $design.lca does not exist in $xrundir run directory." >> $logfile
	echo ERROR: $design.lca does not exist in $xrundir run directory.
	exit 1
  endif
  set program = "xdelay"
  echo "Running xdelay..."
  echo "Running xdelay..." >> $logfile
  echo "xdelay -dw $design " >>& $logfile
  xdelay -dw $design >>& $logfile
  set ret = $status
  if ( $ret != 0 ) then
    goto return_code
  endif
endif

###################################################################
# function: convert LCA file into XNF
# input: design.xnf
# output: designt.xnf
###################################################################


#######
if ( $lca2xnf == 1 ) then
  if ( ! -e $design.lca ) then
	echo "ERROR: $design.lca does not exist in $xrundir run directory." >> $logfile
	echo ERROR: $design.lca does not exist in $xrundir run directory.
	exit 1
  endif
  set ext = "xnf"
  set program = "lca2xnf"
  echo "Running lca2xnf..."
  echo "Running lca2xnf..." >> $logfile
  echo "lca2xnf -wg $design $designt " >>& $logfile
  lca2xnf -wg $design $designt >>& $logfile
  set ret = $status
  if ( $ret != 0 ) then
    goto return_code
  endif
  set ext = "xnf"
endif

###################################################################
# function: restore net and instance names to postrouted XNF
#           program exists
# input: designt.xnf
# output: designt.xbf
###################################################################

if ( $xnfba == 1 ) then
  if ( -e $designt.xbf ) then
     set program = $rm
     $rm -f $designt.xbf
     if ( $ret != 0 ) then
       goto return_code
     endif
  endif

  set program = "xnfba"
  echo "Running xnfba..."
  echo "Running xnfba..." >> $logfile
  echo "xnfba $design $designt.xnf -o $designt.xbf " >>& $logfile
  xnfba $design $designt.xnf -o $designt.xbf >>& $logfile
  set ret = $status
  if ( $ret != 0 ) then
    goto return_code
  endif
    
  set ext = "xbf"
endif

###################################################################
# function: strip out SCHNM=BUFT 
# input:    xnf/xbf file
# output:   xnf file
###################################################################

if ( $stripschnmbuft == 1 ) then
     set program = "stripschnmbuft"
     echo "Running stripschnmbuft..."
     echo "Running stripschnmbuft..." >> $logfile
     echo "stripschnmbuft $designt.$ext" >>& logfile
     stripschnmbuft $designt.$ext >>& $logfile
     set ret = $status
     if ( $ret != 0 ) then
       goto return_code
     endif
endif

###################################################################
# function: prepare xnf file for translation by xnf2verilog.
# input:    xnf file
# output:   xcd file
###################################################################

if ( $x2vprep == 1 ) then
  if ( -e $designt.xcd ) then
     set program = $rm
     $rm -f $designt.xcd
     if ( $ret != 0 ) then
       goto return_code
     endif
  endif

  set program = "x2vprep"
  echo "Running x2vprep..."
  echo "Running x2vprep..." >> $logfile
  echo "x2vprep $designt.$ext $designt.xcd " >>& $logfile
  x2vprep $designt.$ext $designt.xcd >>& $logfile
  set ret = $status
  if ( $ret != 0 ) then
    goto return_code
  endif
    
  set ext = "xcd"
endif
###################################################################
# function: convert XNF to Verilog simulation-
# input: design.xnf
# output: designt.v, 
# 	  designt.stim, 
#	  designt.sdf
###################################################################

if ( $xrundir != $curdir ) then
   cp $designt.$ext $curdir
   cd $curdir
endif

set program = "xnf2verilog"
# echo Running xnf2verilog...
echo Running xnf2verilog... >> $logfile
echo "xnf2verilog $designt.$ext  $designt -s $designt.sdf $x2coption" >>& $logfile
xnf2verilog $designt.$ext  $designt -s $designt.sdf $x2coption |& tee -a $logfile 
set ret = $status

if ( $ret != 0 ) then
 # cat xnf2verilog.log >> $logfile
else
  if ( $xrundir != $curdir ) then
     $rm $designt.$ext
  endif
endif

goto return_code

brief_usage:
set tmpFile = /tmp/timenetx_$$
cat << EOFHELP > $tmpFile

Usage: timenetx input_file  <2000 | 3000 | 4000 | 4000e | 5200 | 7000>  
       [ -o output_cellname]  [-x] [ -pin <path_to_pinfile> ]
       [ -vlibs <path_to_libraries> ] 

Example:  timenetx foo 7000

Type "timenetx -h" for a more detailed options list.

EOFHELP
more $tmpFile
$rm $tmpFile
exit 0

usage:
set tmpFile = /tmp/timenetx_$$
cat << EOFHELP > $tmpFile
 
This program is used to back annotate a Xilinx-implemented LCA or EPLD 
design for Verilog-XL simulation.  In order to do the back-annotation, 
TIMENETX runs LCA2XNF, XNFBA, and XNF2VERILOG for LCA designs, or 
VMH2XNF and XNF2VERILOG for EPLD designs.

An environment variable, CDS_INTFC should be set to the location of 
the Xilinx Interface to Verilog-XL.

Usage: timenetx input_file  <2000 | 3000 | 4000 | 4000e | 5200 | 7000>  
       [ -o output_cellname]  [-x] [ -pin <path_to_pinfile> ]
       [ -vlibs <path_to_libraries> ] 


Example:  timenetx foo 7000


input_file          - is a timing-annotated LCA, VMD, VMH or XNF design.

2000|3000|4000|4000e|5200|7000 - is the target architecture family of your design.

-o output_cellname  - specifies the output design name. This must be different
                      than the input cellname. The default is <input_file>t.


-x                  - skip xnfba. This option is ignored for XC7000 designs.

-pin                - Use specified pin file.
                      This is not needed if the variable CDS_INTFC is
                      declared in your environment.

-vlibs              - Use specified Verilog libraries.
                      This is not needed if the variable CDS_INTFC is
                      declared in your environment.

-r                  - Use specified run directory.  The default is the
                      current working directory.
 
-cds                - skip the Xilinx programs (lca2xnf, xnfba, vmh2xnf).
                      Start with an existing XNF file.



If the environment variable CDS_INTFC pointing to the install directory 
for the Xilinx interface to Verilog has been declared with a setenv 
statement, the location of the pin file will be set to 

	\$CDS_INTFC/data/xcXXXXX.pin, 
	
and the location of the appropriate library will be assumed to be 

	\$CDS_INTFC/verilogXXXX, 

where XXXX is either 2000, 3000, 4000, 4000e, 5200, or 7000.

EOFHELP
more $tmpFile
$rm $tmpFile
exit 0

return_code:
  echo ""

if ( $ret != 0 ) then
    echo "Errors found while running $program. Check the $logfile:t file."
  else
    echo "timenetx finished. All output piped to $logfile:t file."
    endif
  endif
  exit $ret


